| DRAM types |
XDR DRAM or extreme data rate dynamic random access memory is a high-performance RAM interface and successor to the Rambus RDRAM it is based on, competing with the rival DDR2 SDRAM and GDDR4 technology. Rambus Incorporated ( founded in 1990, is a provider of high-speed interface technology most notably their Rambus Dynamic RAM memory technology, which Direct Rambus DRAM or DRDRAM (sometimes just called Rambus DRAM or RDRAM) is a type of synchronous dynamic RAM, designed by the Rambus GDDR4 SDRAM (Graphics Double Data Rate version 4 is a type of Graphics card memory specified by the JEDEC Semiconductor Memory Standard XDR was designed to be effective in small, high-bandwidth consumer systems, high-performance memory applications, and high-end GPUs. It eliminates the unusually high latency problems that plagued early forms of RDRAM. Also, the XDR DRAM have heavy emphasis on per pin bandwidth, which can benefit further cost control on PCB production. This is because fewer lanes are needed for the same amount of bandwidth. Rambus owns the rights to the technology. XDR is used by Sony in the PlayStation 3 console. is a multinational conglomerate corporation headquartered in Minato Tokyo, Japan, and one of the world's largest Media conglomerates with [1]
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Parameters
Performance
- Initial clock rate at 400 MHz. 600 MHz, 800 MHz with 1066 MHz planned for the future.
- Octal Data Rate (ODR): Eight bits per clock per lane.
- Each chip provides 8 or 16 lanes, providing 25. 6 or 51. 2 Gbit/s (3. A gigabit is a unit of information or computer storage abbreviated Gbit (or Gb) 2 or 6. 4 GB/s) at 400 MHz. A gigabyte (derived from the SI prefix Giga-) is a unit of Information or Computer
Features
- Bi-directional differential Rambus Signalling Levels (DRSL)
- This uses differential open-collector driver, voltage swing 0. Differential signaling is a method of transmitting Information electrically by means of two complementary Signals sent on two separate wires Open collector is a type of output on many integrated circuits (IC. 2V. It is not the same as LVDS. Low-voltage differential signaling, or LVDS, is an electrical signaling system that can run at very high speeds over inexpensive Twisted-pair copper cables [1]
- Programmable on-chip termination
- Adaptive impedance matching
- Eight bank memory architecture
- Up to four bank-interleaved transactions at full bandwidth
- Point-to-point data interconnect
- Chip scale package packaging
- Dynamic request scheduling
- Early-read-after-write support for maximum efficiency
- Zero overhead refresh
Power Requirements
- 1. A chip scale package ( CSP) (sometimes chip-scale package with a hyphen is a type of Integrated circuit Chip carrier. 8 V Vdd
- Programmable ultra-low-voltage DRSL 200 mV swing
- Low-power PLL/DLL design
- Power-down self-refresh support
- Dynamic data width support with dynamic clock gating
- Per-pin I/O power-down
- Sub-page activation support
Ease of system design
- Per-bit FlexPhase circuits compensate to a 2. Almost all Integrated circuits (ICs have at least two pins which connect to the power rails of the circuit they are installed in A phase-locked loop or phase lock loop (PLL is a Control system that generates a signal that has a fixed relation to the phase of a "reference" In electronics a delay-locked loop (DLL is a digital circuit similar to a Phase-locked loop (PLL with the main difference being the absence of an internal Oscillator 5 ps resolution
- XDR Interconnect uses minimum pin count
Latency
- 1. 25/2. 0/2. 5/3. 33 ns request packets
See also
References
External links
- Rambus XDR Product Page
- Rambus FlexIO CPU Interface provides XDR Interface
- Qimonda XDR(TM) DRAM product
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