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Intel Core 2 Duo, an example of a state-of-the-art x86 compatible multi-core processor.
Intel Core 2 Duo, an example of a state-of-the-art x86 compatible multi-core processor.
AMD Athlon (early version), another technically different, but fully compatible x86 implementation.
AMD Athlon (early version), another technically different, but fully compatible x86 implementation.

The generic term x86 refers to the instruction set of the most commercially successful CPU architecture in the history of personal computing. An instruction set is a list of all the instructions and all their variations that a processor can execute A personal computer ( PC) is any Computer whose original sales price size and capabilities make it useful for individuals and which is intended to be operated [1] It is used in processors from Intel, AMD, VIA, and others, and derived from the model numbers of the first few generations of processors, backward compatible with Intel's original 16-bit 8086 CPU, most of which were ending in 86. VIA Technologies ( is a Taiwanese manufacturer of Integrated circuits mainly Motherboard Chipsets CPUs, and memory, and In Technology, especially Computing (irrespective of platform a product is said to be backward compatible when it is able to take the place of an older product The 8086 is a 16-bit Microprocessor chip designed by Intel and introduced on the market in 1978 which gave rise to the X86 architecture [2] Since then, many additions and extensions have been added to the x86 instruction set, almost consistently with full backwards compatibility.

As the x86 term became common after the introduction of the 80386, it usually implies a binary compatibility with the 32-bit instruction set of the 80386. An instruction set is a list of all the instructions and all their variations that a processor can execute This may sometimes be emphasized as x86-32 to distinguish it either from the original 16-bit x86-16 or from the newer 64-bit x86-64 (also called x64). IA-32 ( Intel Architecture 32-bit) often generically called X86 or x86-32, is the Instruction set architecture of Intel x86-64 is a Superset of the x86 instruction set architecture. x86-64 is a Superset of the x86 instruction set architecture. [3]

Modern x86-hardware usually has 64-bit capabilities, at least in personal computers and servers. A personal computer ( PC) is any Computer whose original sales price size and capabilities make it useful for individuals and which is intended to be operated However, to avoid compatibility problems, x86-software usually implies only 32-bit, with the term x86-64 or x64 reserved to denote 64-bit software. x86-64 is a Superset of the x86 instruction set architecture. [4][5]

Today, the x86 architecture is ubiquitous among desktop and notebook processors, as well as a growing majority among servers and workstations. With the exception of AMD's Geode CPU and Intel's new Silverthorne CPU, the x86 processor architecture is generally uncommon in embedded systems, and niches such as appliances and toys lack any significant x86 presence. For other uses of Geode see Geode (disambiguation Geode is a series of X86 -compatible System-on-a-chip Microprocessors Intel Atom is the Brand name for a line of X86 and X86-64 CPUs (or Microprocessors from Intel, previously code-named An embedded system is a special-purpose Computer system designed to perform one or a few dedicated functions often with Real-time computing constraints [6] A large amount of computer software supports the platform, including operating systems such as MS-DOS, Windows, Linux, BSD, Solaris, and Mac OS X. An operating system (commonly abbreviated OS and O/S) is the software component of a Computer system that is responsible for the management and coordination MS-DOS (short for M icro' s' oft D isk O perating S ystem is an Operating system commercialized by Microsoft. Microsoft Windows is a series of Software Operating systems and Graphical user interfaces produced by Microsoft. Linux (commonly pronounced ˈlɪnəks Solaris is a Unix -based Operating system introduced by Sun Microsystems in 1992 as the successor to SunOS. Mac OS X (mæk oʊ ɛs tɛn is a line of computer Operating systems developed marketed and sold by Apple Inc, the latest of which is pre-loaded on all currently

Contrary to popular belief, x86 architecture is not completely synonymous with IBM PC compatibility, as IBM PC compatibles use a multitude of other hardware in order to work properly, albeit with some of it standardized. IBM PC compatible computers are those generally similar to the original IBM PC, XT, and AT. For instance, the original Xbox game console used an x86 chip, but its hardware was different from the typical PC, and the Xbox controllers did not conform to keyboard or joystick scancode standards. The Xbox is a sixth-generation Video game console produced by Microsoft Corporation. Also, the GRID Compass laptop (one of the first on the market) used an x86 chip before the IBM PC compatible market even started. The Grid Compass 1100 (written GRiD by its manufacturer was arguably the first Laptop computer, introduced in April 1982

Contents

Chronology

The table below lists brands of common[7] consumer targeted processors implementing the x86 instruction set, grouped by generations that highlight important points in x86 history. An instruction set is a list of all the instructions and all their variations that a processor can execute Note: CPU generations are not strict - each generation is roughly marked by significantly improved or commercially successful processor microarchitecture designs. In Computer engineering, microarchitecture (sometime abbreviated to µarch or uarch is a description of the Electrical circuitry of a Computer, Central

Generation First introduced Prominent Consumer CPU brands linear / physical address space Notable (new) features
1 (IA-16) 1978 Intel 8086, Intel 8088 16-bit / 20-bit (segmented) first x86 microprocessors
2 1982 Intel 80186, Intel 80188, NEC V20 see above hardware for fast address calculations, fast mul/div etc
2 1982 Intel 80286 16-bit (30-bit virtual) / 24-bit (segmented) MMU, for protected mode and a larger address space
3 (IA-32) 1985 Intel386, AMD Am386 32-bit (46-bit virtual) / 32-bit 32-bit instruction set, MMU with paging
4 1989 Intel486 see above risc-like pipelining, integrated FPU, on-chip cache
5 1993 Pentium, Pentium MMX see above superscalar, 64-bit databus, faster FPU, MMX
5/6 1996 Cyrix 6x86, Cyrix MII see above register renaming, speculative execution
6 1995 Pentium Pro, AMD K5 see above / 36-bit physical (PAE) μ-op translation, PAE (not K5), integrated L2 cache (not K5)
6 1997 AMD K6/-2/3, Pentium II/III see above L3-cache support, 3D Now, SSE
7 1999 Athlon, Athlon XP see above superscalar FPU, wide design (up to three x86 instr. See also X86 assembly language The generic term x86 refers to the most commercially successful Instruction set architecture in the history of Personal The 8086 is a 16-bit Microprocessor chip designed by Intel and introduced on the market in 1978 which gave rise to the X86 architecture The Intel 8088 is an Intel X86 Microprocessor based on the 8086, with 16- Bit registers and an 8-bit external Data bus The 80186 is a Microprocessor that was developed by Intel circa 1982. The Intel 80188 is a version of the Intel 80186 microprocessor with an 8 bit external Data bus, instead of 16 bit NEC V20 (μPD70108 was a processor made by NEC that was a reversed-engineered, pin-compatible version of the Intel 8088 with an Instruction The Intel 286, introduced on February 1, 1982, (originally named 80286, and also called iAPX 286 in the programmer's manual A memory management unit ( MMU) sometimes called paged memory management unit ( PMMU) is a Computer hardware component responsible for handling In computing protected mode, also called protected virtual address mode, is an operational mode of X86 -compatible Central processing units (CPU In Computing, an address space defines a range of discrete addresses each of which may correspond to a physical or virtual Memory register, a network host IA-32 ( Intel Architecture 32-bit) often generically called X86 or x86-32, is the Instruction set architecture of Intel The Am386 CPU was released by AMD in 1991. A 100%-compatible clone of the Intel 80386 design it sold millions of units The range of Integer values that can be stored in 32 bits is 0 through 4294967295 or −2147483648 through 2147483647 using Two's complement encoding An instruction set is a list of all the instructions and all their variations that a processor can execute The Intel 486, otherwise known as the 80486 i486 or just 486 was the first tightly pipelined X86 design In Computing, a pipeline is a set of data processing elements connected in series so that the output of one element is the input of the next one A floating point unit (FPU is a part of a Computer system specially designed to carry out operations on Floating point numbers The Pentium brand refers to Intel 's single-core x86 Microprocessor based on the P5 fifth-generation Microarchitecture. The Pentium brand refers to Intel 's single-core x86 Microprocessor based on the P5 fifth-generation Microarchitecture. A superscalar CPU architecture implements a form of parallelism called Instruction-level parallelism within a single processor '64-bit' CPUs have existed in Supercomputers since the 1960s and in RISC -based workstations and servers since the early 1990s. In Computer architecture, a bus is a subsystem that transfers data between computer components inside a Computer or between computers MMX is a single instruction multiple data (SIMD Instruction set designed by Intel, introduced in 1997 in their Pentium line of The Cyrix 6x86 (codename M1 is a sixth-generation 32-bit 80x86 -compatible Microprocessor designed by Cyrix and manufactured by IBM The Cyrix 6x86 (codename M1 is a sixth-generation 32-bit 80x86 -compatible Microprocessor designed by Cyrix and manufactured by IBM In Computer engineering, register renaming refers to a technique usedto avoid unnecessary serialization of program operations imposed by the reuseof registers by those In Computer science, speculative execution is the execution of code, the result of which may not be needed The Pentium Pro is a sixth-generation X86 -based Microprocessor developed and manufactured by Intel introduced in November 1995 The K5 was AMD's first x86 processor developed entirely in-house introduced in March 1996 In Computing, Physical Address Extension ( PAE) refers to a feature of X86 and X86-64 processors that allows more than 4 Gigabytes ( The K6 microprocessor was launched by AMD in 1997 The main advantage of this particular microprocessor is that it was designed to fit into existing desktop designs for The K6-2 was an X86 Microprocessor introduced by AMD on May 28 1998 and available in speeds ranging from 266 to 550 MHz. The Pentium II brand refers to Intel 's sixth-generation Microarchitecture (" Intel P6 " and x86 -compatible Microprocessors Pentium III variants Katmai The first Pentium III variant was the Katmai (Intel product code 80525 3DNow! is the Trade name of a multimedia extension created by AMD for its processors starting with the K6-2 in 1998 S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 Athlon is the brand name applied to a series of different X86 processors designed and manufactured by AMD. Athlon is the brand name applied to a series of different X86 processors designed and manufactured by AMD. /clock)
7 2000 Pentium 4 see above deeply pipelined, high frequency, SSE2, hyper-threading
6/7-M 2003 Pentium M see above optimized for low power
8 (x86-64) 2003 Athlon 64 64-bit / 40-bit physical in first impl. The Pentium 4 brand refers to Intel 's line of single- core mainstream desktop and Laptop Central processing units (CPUs introduced In Computing, a pipeline is a set of data processing elements connected in series so that the output of one element is the input of the next one SSE2, Streaming SIMD Extensions 2, is one of the IA-32 SIMD (Single Instruction Multiple Data Instruction sets SSE2 was first introduced by Hyper-threading (officially termed Hyper-Threading Technology or HTT) is an Intel-proprietary technology Overview The Pentium M represented a new and radical departure for Intel as it was not a low-power version of the desktop-oriented Pentium 4, but instead a heavily modified The Thermal Design Power (TDP (sometimes called Thermal Design Point) represents the maximum amount of power the cooling system in a computer is required to dissipate x86-64 is a Superset of the x86 instruction set architecture. The Athlon 64 is an eighth-generation AMD64 architecture Microprocessor produced by AMD, released on x86-64 instruction set, on-die memory controller, hypertransport
8 2004 Prescott see above very deeply pipelined, very high frequency, SSE3
9 2006 Intel Core, Intel Core 2 see above (some are 32-bit only) low power, multi-core, lower clock frequency, SSE4
10 2007-2008 AMD Phenom see above monolithic quad-core, 128 bit FPUs, SSE4a Hyper Transport 3, native memory controller, on-die L3 cache

History

The x86 architecture first appeared as the Intel 8086 CPU released in 1978, a fully 16-bit design based on the earlier Intel 8085. x86-64 is a Superset of the x86 instruction set architecture. The Pentium 4 brand refers to Intel 's line of single- core mainstream desktop and Laptop Central processing units (CPUs introduced In Computing, a pipeline is a set of data processing elements connected in series so that the output of one element is the input of the next one SSE3, also known by its Intel code name Prescott New Instructions (PNI, is the third iteration of the SSE instruction set for the IA-32 architecture The Core brand refers to Intel 's 32-bit mobile Dual-core X86 CPUs that derived from the Pentium M branded processors The Core 2 brand refers to a range of Intel 's consumer 64-bit dual-core and 2x2 MCM quad-core CPUs with the X86-64 instruction set A multi-core processor (or chip-level multiprocessor, CMP) combines two or more independent cores into a single package composed of a single Integrated SSE4 is an Instruction set used in the Intel Core microarchitecture and AMD K10 (K8L. Phenom (pronounced as IPA/finɒm/ as in the word phenomenon) is the AMD desktop processor line based on the K10 ( not "K10h") microarchitecture SSE4 is an Instruction set used in the Intel Core microarchitecture and AMD K10 (K8L. The 8086 is a 16-bit Microprocessor chip designed by Intel and introduced on the market in 1978 which gave rise to the X86 architecture The Intel 8085 is an 8-bit Microprocessor introduced by Intel in 1977 Although not binary compatible, it was designed to allow assembly language programs written for the 8085 be mechanically translated into the equivalent 8086 assembly. See the terminology section below for information regarding inconsistent use of the terms assembly and assembler This made the new processor a tempting migration path for 8085 hardware and software vendors, but - mainly due to a wider databus - not without significant redesign of system hardware. To address this, Intel introduced the almost identical, but externally 8-bit, 8088 which permitted simpler printed circuit boards, demanded fewer (1-bit wide) DRAM chips, and more easily could be interfaced to already established (i. The Intel 8088 is an Intel X86 Microprocessor based on the 8086, with 16- Bit registers and an 8-bit external Data bus A printed circuit board, or PCB, is used to mechanically support and electrically connect Electronic components using conductive pathways or traces e. low-cost) 8-bit system and peripheral chips. Among other, non technical, factors, this contributed to the fact that IBM built their IBM PC around the 8088, despite a presence of (at the time) better 16-bit microprocessors from Motorola, Zilog, and National Semiconductor. Subsequently, the IBM PC became the dominant personal computer platform and the 8088 and its successors became the dominant CPU architecture for desktop and laptop computers.

At various times, companies such as IBM, NEC, AMD, TI, STM, Fujitsu, OKI, Siemens, Cyrix, Intersil, C&T, NexGen, and UMC started to design and/or manufacture x86 processors intended for personal computers as well as embedded systems. International Business Machines Corporation abbreviated IBM and nicknamed "Big Blue", is a multinational Computer Technology is a Japanese multinational IT company headquartered in Minato Tokyo, Japan. Texas Instruments ( better known in the electronics industry (and popularly as TI, is an American company based in Dallas, Texas, USA STMicroelectronics (,)is an franco-italian Electronics and Semiconductor manufacturer headquartered in in Geneva, Switzerland. is a Japanese company specializing in Semiconductors Computers ( Supercomputers Personal computers, servers, Telecommunications Cyrix was a CPU manufacturer that began in 1978 in Richardson Texas as a specialist supplier of high-performance math co-processors for 286 and Intersil Corporation specializes in the design and manufacture of high-performance analog Semiconductors for four high-growth markets — Communications Computing High End Chips and Technologies ( C&T) was the first Fabless semiconductor company, a model developed by its founder Gordon Campbell NexGen (Milpitas CA was a private Semiconductor company that designed X86 PC Central processing units until it was purchased UMC ( United Microelectronics Corporation) was founded as Taiwan's first Semiconductor company in 1980 as a spin-off of the government-sponsored institute ITRI Such x86 implementations are seldom plain copies but often employ different internal microarchitectures as well as different solutions at the electronic and physical levels. In Computer engineering, microarchitecture (sometime abbreviated to µarch or uarch is a description of the Electrical circuitry of a Computer, Central Quite naturally, early compatible chips were 16-bit, while 32-bit designs appeared much later. For the personal computer market, real quantities started to appear around 1990 with i386 and i486 compatible processors, often named similarly to Intel's original chips. A personal computer ( PC) is any Computer whose original sales price size and capabilities make it useful for individuals and which is intended to be operated The Intel 486, otherwise known as the 80486 i486 or just 486 was the first tightly pipelined X86 design Other companies, which designed or manufactured x86 or x87 processors, include ITT Corporation, National Semiconductor, ULSI System Technology, and Weitek. x87 is a math-related instruction subset of the X86 architecture of processors. ITT Corporation, is a global diversified manufacturing company with 2007 revenues of $9 National Semiconductor ( is a Semiconductor manufacturer specializing in analog devices and subsystems headquartered in Santa Clara, California, Weitek Corporation was a former Chip -design company that originally concentrated on Floating point units for a number of commercial CPU designs

Following the fully pipelined i486, Intel introduced the Pentium brand name (which, unlike numbers, could be trademarked) for their new line of superscalar x86 designs. In Computing, a pipeline is a set of data processing elements connected in series so that the output of one element is the input of the next one The Intel 486, otherwise known as the 80486 i486 or just 486 was the first tightly pipelined X86 design The Pentium brand refers to Intel 's single-core x86 Microprocessor based on the P5 fifth-generation Microarchitecture. A superscalar CPU architecture implements a form of parallelism called Instruction-level parallelism within a single processor With the x86 naming scheme now legally cleared, IBM partnered with Cyrix to produce the 5x86 and then the very efficient 6x86 (M1) and 6x86MX (MII) lines of Cyrix designs, which were the first x86 chips implementing register renaming to enable speculative execution. International Business Machines Corporation abbreviated IBM and nicknamed "Big Blue", is a multinational Computer Technology Cyrix was a CPU manufacturer that began in 1978 in Richardson Texas as a specialist supplier of high-performance math co-processors for 286 and 5x86 may refer to Cyrix Cx5x86, computer chip made by Cyrix Am5x86, 486 computer chip made by AMD See also The Cyrix 6x86 (codename M1 is a sixth-generation 32-bit 80x86 -compatible Microprocessor designed by Cyrix and manufactured by IBM The Cyrix 6x86 (codename M1 is a sixth-generation 32-bit 80x86 -compatible Microprocessor designed by Cyrix and manufactured by IBM A Mii (ˈmiː me) is a digital avatar created by Nintendo for the Wii 's Mii Channel. Cyrix was a CPU manufacturer that began in 1978 in Richardson Texas as a specialist supplier of high-performance math co-processors for 286 and In Computer engineering, register renaming refers to a technique usedto avoid unnecessary serialization of program operations imposed by the reuseof registers by those In Computer science, speculative execution is the execution of code, the result of which may not be needed AMD meanwhile designed and manufactured the advanced but delayed 5k86 (K5), which, internally, was heavily based on AMD's earlier 29K RISC design; similar to NexGen's Nx586, it used a strategy where dedicated pipeline stages decode x86 instructions into uniform and easily handled micro-operations, a method that has remained standard to this day. The K5 was AMD's first x86 processor developed entirely in-house introduced in March 1996 AMD 29000, often simply 29k, was a popular family of RISC -based 32-bit Microprocessors and Microcontrollers from Advanced Micro Devices NexGen (Milpitas CA was a private Semiconductor company that designed X86 PC Central processing units until it was purchased NexGen (Milpitas CA was a private Semiconductor company that designed X86 PC Central processing units until it was purchased In Computer Central processing units micro-operations, also known as a micro-ops or μops, are detailed low-level instructions used in some

Some early versions of these chips had heat dissipation problems. The 6x86 was also affected by a few minor compatibility issues, the Nx586 lacked an FPU and (the then crucial) pin-compatibility, while the K5 had somewhat disappointing performance when it was (eventually) launched. NexGen (Milpitas CA was a private Semiconductor company that designed X86 PC Central processing units until it was purchased A floating point unit (FPU is a part of a Computer system specially designed to carry out operations on Floating point numbers A low customer awareness of alternatives to the Pentium line further contributed to these designs being comparatively unsuccessful, despite the fact that the K5 had very good Pentium compatibility and the 6x86 was significantly faster than the Pentium on integer code. The Cyrix 6x86 (codename M1 is a sixth-generation 32-bit 80x86 -compatible Microprocessor designed by Cyrix and manufactured by IBM [8] AMD later managed to establish itself as a serious contender with the K6 line of processors, which gave way to the highly successful Athlon and Opteron. The K6 microprocessor was launched by AMD in 1997 The main advantage of this particular microprocessor is that it was designed to fit into existing desktop designs for Athlon is the brand name applied to a series of different X86 processors designed and manufactured by AMD. The Opteron is AMD 's X86 server processor line and was the first processor to implement the AMD64 Instruction set architecture (known There were also other contenders, such as Centaur Technology, (IDT), Rise Technology, and Transmeta. Centaur Technology is an x86 CPU design company now a wholly owned subsidiary of VIA Technologies, a member of the Formosa Plastics Group, IDT ( was founded in 1980 as a Semiconductor vendor Employing approximately 2500 people worldwide headquartered in San Jose California and operating Rise Technology, was a short lived Microprocessor manufacturer that produced the Intel X86 MMX compatible MP6 processor Transmeta Corporation ( is a US -based Corporation that licenses low power semiconductor IP VIA Technologies' energy efficient C3 and C7 processors were designed by Centaur and are in full production today. VIA Technologies ( is a Taiwanese manufacturer of Integrated circuits mainly Motherboard Chipsets CPUs, and memory, and The VIA C3 is a family of X86 Central processing units for Personal computers designed by Centaur Technology and sold by VIA Technologies The VIA C7 is an X86 Central processing unit designed by Centaur Technology and sold by VIA Technologies. Centaur Technology is an x86 CPU design company now a wholly owned subsidiary of VIA Technologies, a member of the Formosa Plastics Group,

The architecture has twice been extended to a larger word size. In Computing, " word " is a term for the natural unit of data used by a particular computer design In 1985, Intel released the 32-bit 386 to gradually replace the earlier 16-bit chips (which were sold for many more years). This extension to the architecture is sometimes called x86-32 to differentiate it from the original "x86-16" or the newer x86-64 extension. x86-64 is a Superset of the x86 instruction set architecture. However, it was originally referred to as i386 by Intel (and others) and later renamed IA-32 (for Intel Architecture-32-bit) when Intel unveiled its unrelated 64-bit Itanium architecture, referred to as IA-64. IA-32 ( Intel Architecture 32-bit) often generically called X86 or x86-32, is the Instruction set architecture of Intel Itanium is the brand name for 64-bit Intel Microprocessors that implement the Intel Itanium architecture (formerly called IA-64) Itanium is the brand name for 64-bit Intel Microprocessors that implement the Intel Itanium architecture (formerly called IA-64) In 1999-2003, AMD further extended the architecture to 64 bits, originally called x86-64 in AMD documents, but now AMD64. x86-64 is a Superset of the x86 instruction set architecture. x86-64 is a Superset of the x86 instruction set architecture. Intel soon adopted AMD's architectural extensions under the name IA-32e which was later renamed EM64T and finally Intel 64 (not to be confused with the unrelated IA-64 architecture). x86-64 is a Superset of the x86 instruction set architecture. x86-64 is a Superset of the x86 instruction set architecture. x86-64 is a Superset of the x86 instruction set architecture. Itanium is the brand name for 64-bit Intel Microprocessors that implement the Intel Itanium architecture (formerly called IA-64) Microsoft and Sun Microsystems have used their own vendor-neutral x64 for this same x86-64 architecture. Microsoft Corporation is an American multinational Computer technology Corporation, which rose to dominate the Home computer Sun Microsystems Inc ( is a multinational vendor of Computers computer components Computer software, and Information technology services x86-64 is a Superset of the x86 instruction set architecture. x86-64 is a Superset of the x86 instruction set architecture.

Overview

Basic properties of the architecture

The x86 architecture is a variable instruction length, primarily two-address, "CISC" design with emphasis on backward compatibility. A complex instruction set computer ( CISC, pronounced like " sisk " is a Microprocessor Instruction set architecture (ISA in which In Technology, especially Computing (irrespective of platform a product is said to be backward compatible when it is able to take the place of an older product The instruction set is not typical CISC however, but basically an extended and orthogonalized version of the simple eight-bit 8085 architecture. The Intel 8085 is an 8-bit Microprocessor introduced by Intel in 1977 Words are stored in little-endian order and 16-bit and 32-bit accesses are allowed to unaligned memory addresses.

To conserve opcode space, most register-addresses are three bits, and at most one operand can be in memory (some highly orthogonal "CISC" designs, such as the PDP-11, may use two memory operands), but this memory operand may also be the destination, while the other operand, the source, can be either register or immediate. The PDP-11 was a series of 16-bit Minicomputers sold by Digital Equipment Corp This contributes, among other factors, to a code footprint that rivals eight-bit machines and enables efficient use of instruction cache memory. The relatively small number of general registers (also inherited from 8085) has made register-relative addressing (using small immediate offsets) an important method of accessing operands, especially on the stack. Much work has therefore been invested in making such accesses as fast as register accesses, i. e. a one cycle instruction throughput in most circumstances.

Current implementations

During execution, current x86 processors employ extra decoding steps to split most instructions into smaller pieces. Execution in computer and Software engineering is the process by which a Computer or Virtual computer carries out the instructions These are then handed to a control unit that buffers and schedules them in compliance with x86 semantics so that they can be executed by one of three or four execution engines. Furthermore modern design are usually superscalar and features out of order execution, which means they can execute multiple x86 instructions simultaneously and not necessarily in the same order as given in the instruction stream. A superscalar CPU architecture implements a form of parallelism called Instruction-level parallelism within a single processor In Computer engineering, out-of-order execution, OoOE, is a paradigm used in most high-performance Microprocessors to make use of cycles that

When Intel first introduced this design approach with the Pentium Pro they referred to it as a "RISC Core", but soon dropped that term. The approach is similar to the traditional microcode used in their earlier x86 designs but differs mainly in the fact that the translation from the external instruction set to the internal occurs asynchronously. Microprogramming (ie writing microcode) is a method that can be employed to implement Machine instructions in a CPU relatively easily often using less Not having to synchronize the CPU's internals with the decode steps relieves a burden on the CPU designers.

Transmeta does not use this approach in their x86 compatible CPUs. Transmeta Corporation ( is a US -based Corporation that licenses low power semiconductor IP Instead they use a just-in-time translation engine to convert x86 instructions to the CPU's native instructions. Transmeta argues that their approach allows for more power efficient designs since the CPU can forgo the complicated decode step of more traditional x86 implementations.

Segmentation

Further information: x86 memory segmentation

Minicomputers during the late 1970s were running up against the 16-bit 64-KiB address limit, as memory had become cheaper. x86 memory segmentation refers to the implementation of Memory segmentation on the X86 architecture. A kibibyte (a contraction of ki lo bi nary byte) is a unit of Information or Computer storage, established by the International Most such companies therefore redesigned their processors to directly handle 32-bit addressing and data. The original 8086, developed from the simple 8085 microprocessor and primarily aiming at another market, instead adopted a much-criticized concept of segment registers which raised the memory address limit by only 4 bits, to 20 bits (1 mebibyte). The Intel 8085 is an 8-bit Microprocessor introduced by Intel in 1977 A mebibyte (a contraction of me ga bi nary byte) is a unit of Information or Computer storage, abbreviated MiB.

Data and/or code could be managed within "near" 16-bit segments within this 1 MiB address space, or a compiler could operate in a "far" mode using 32-bit segment:offset pairs reaching (only) 1 MiB. A mebibyte (a contraction of me ga bi nary byte) is a unit of Information or Computer storage, abbreviated MiB. While that would also prove to be quite limiting by the mid-1980s, it was working for the emerging PC market, and made it very simple to translate software from the older 8080, 8085, and Z80 to the newer processor. The Intel 8080 was an early Microprocessor designed and manufactured by Intel. The Intel 8085 is an 8-bit Microprocessor introduced by Intel in 1977 The Zilog Z80 is an 8-bit Microprocessor designed and sold by Zilog from July 1976 onwards Seven years later, in 1985, this cumbersome addressing model was effectively factored out by the introduction of 32-bit offset registers, in the 386 design.

In real mode, segmentation is achieved by shifting the segment address left by 4 bits and adding an offset in order to receive a final 20-bit address. Real mode, also called real address mode, is an operating mode of 80286 and later X86 -compatible CPUs. In Computer programming, a bitwise operation operates on one or two Bit patterns or binary numerals at the level of their individual Bits On most For example, if DS is A000h and SI is 5677h, DS:SI will point at the absolute address DS × 16 + SI = A5677h. Thus the total address space in real mode is 220 bytes, or 1 MiB, quite an impressive figure for 1978. A mebibyte (a contraction of me ga bi nary byte) is a unit of Information or Computer storage, abbreviated MiB. All memory addresses consist of both a segment and offset; every type of access (code, data, or stack) has a default segment register associated with it (for data the register is usually DS, for code it is CS, and for stack it is SS). For data accesses, the segment register can be explicitly specified (using a segment override prefix) to use any of the four segment registers.

In this scheme, two different segment/offset pairs can point at a single absolute location. Thus, if DS is A111h and SI is 4567h, DS:SI will point at the same A5677h as above. This scheme makes it impossible to use more than four segments at once. CS and SS are vital for the correct functioning of the program, so that only DS and ES can be used to point to data segments outside the program (or, more precisely, outside the currently-executing segment of the program) or the stack. This scheme was intended as a compatibility measure with the Intel 8085. The Intel 8085 is an 8-bit Microprocessor introduced by Intel in 1977

In protected mode, a segment register no longer contains the physical address of the beginning of a segment, but contain a "selector" that points to a system-level structure called a segment descriptor. In computing protected mode, also called protected virtual address mode, is an operational mode of X86 -compatible Central processing units (CPU A segment descriptor contains the physical address of the beginning of the segment, the length of the segment, and access permissions to that segment. The offset is checked against the length of the segment, with offsets referring to locations outside the segment causing an exception. Offsets referring to locations inside the segment are combined with the physical address of the beginning of the segment to get the physical address corresponding to that offset.

The segmented nature can make programming and compilers design difficult because the use of near and far pointers affect performance. The introduction of bank switching schemes such as EEMS made programming even more complicated before the adoption of 32 bit addressing methods with later processors.

Addressing modes

Addressing modes for 16-bit x86 processors can be summarized by this formula:


\begin{Bmatrix}CS:\\DS:\\SS:\\ES:\end{Bmatrix}
\begin{bmatrix}\begin{Bmatrix}IP\\BX\\BP\end{Bmatrix}\end{bmatrix} + 
\begin{bmatrix}\begin{Bmatrix}SI\\DI\end{Bmatrix}\end{bmatrix} +
[displacement]

Addressing modes for 32-bit code on 32-bit or 64-bit x86 processors can be summarized by this formula:


\begin{Bmatrix}CS:\\DS:\\SS:\\ES:\\FS:\\GS:\end{Bmatrix}
\begin{bmatrix}\begin{Bmatrix}EAX\\EBX\\ECX\\EDX\\ESP\\EBP\\ESI\\EDI\end{Bmatrix}\end{bmatrix} + 
\begin{bmatrix}\begin{Bmatrix}EAX\\EBX\\ECX\\EDX\\EBP\\ESI\\EDI\end{Bmatrix}*\begin{Bmatrix}1\\2\\4\\8\end{Bmatrix}\end{bmatrix} +
[displacement]

Addressing modes for 64-bit code on 64-bit x86 processors can be summarized by these formulas:


\begin{Bmatrix}:\\FS:\\GS:\end{Bmatrix}
\begin{bmatrix}generalregister\end{bmatrix} + 
\begin{bmatrix}generalregister*\begin{Bmatrix}1\\2\\4\\8\end{Bmatrix}\end{bmatrix} +
[displacement]

and

RIP + [displacement]

The 8086 had 64 KiB of 8-bit (or alternatively 32 K-word of 16-bit) I/O space, and a 64 KB (one segment) stack in memory supported by hardware. In Computing, input/output, or I/O, refers to the communication between an Information processing system (such as a Computer) and the outside In Computer science, a stack is an Abstract data type and Data structure based on the principle of Last In First Out (LIFO Hardware is a general term that refers to the physical artifacts of a Technology. Only words (2 bytes) can be pushed to the stack. The stack grows downwards (toward numerically lower addresses), its bottom being pointed by SS:SP. There are 256 interrupts, which can be invoked by both hardware and software. In Computing, an interrupt is an asynchronous signal from hardware indicating the need for attention or a synchronous event in software indicating the need for a change The interrupts can cascade, using the stack to store the return address. In postal Mail, a return address is an explicit inclusion of the address of the person sending the message

x86 registers

For a description of the general notion of a CPU register, see Processor register. In Computer architecture, a processor register is a small amount of storage available on the CPU whose contents can be accessed more quickly than storage

16-bit

The original Intel 8086 and 8088 have fourteen 16-bit registers. The 8086 is a 16-bit Microprocessor chip designed by Intel and introduced on the market in 1978 which gave rise to the X86 architecture The Intel 8088 is an Intel X86 Microprocessor based on the 8086, with 16- Bit registers and an 8-bit external Data bus A bit is a binary digit, taking a value of either 0 or 1 Binary digits are a basic unit of Information storage and communication Four of them (AX, BX, CX, DX) are general registers (although each may have an additional purpose; for example only CX can be used as a counter with the loop instruction). Each can be accessed as two separate bytes (thus BX's high byte can be accessed as BH and low byte as BL). Four segment registers (CS, DS, SS and ES) are used to form a memory address. There are two pointer registers. SP points to the bottom of the stack and BP which is used to point at some other place in the stack or the memory(Offset). Two registers (SI and DI) are for array indexing. The FLAGS register contains flags such as carry flag, overflow flag and zero flag. This article discusses the flag register specific to the x86 architecture In Computer programming, flag refers to one or more Bits that are used to store a binary value or Code that has an assigned meaning In Computer processors the carry flag (usually indicated as the C flag is a single Bit in a system status (flag register used to indicate when In Computer processors the overflow flag (sometimes called V flag is usually a single Bit in a system Status register used to indicate Finally, the instruction pointer (IP) points to the current instruction.

32-bit

With the advent of the 32-bit 80386 processor, the 16-bit general-purpose registers, base registers, index registers, instruction pointer, and FLAGS register, but not the segment registers, were expanded to 32 bits. This article discusses the flag register specific to the x86 architecture This is represented by prefixing an "E" (for Extended) to the register opcodes (thus the expanded AX became EAX, SI became ESI and so on). In computer technology an opcode ( op eration code) is the portion of a Machine language instruction that specifies the operation to be performed The general-purpose registers, base registers, and index registers could all be used as the base in addressing modes, and all of those registers except for the stack pointer could be used as the index in addressing modes. Two new segment registers (FS and GS) were added. With a greater number of registers, instructions and operands, the machine code format was expanded. Machine code or machine language is a system of instructions and data executed directly by a Computer 's Central processing unit. To provide backward compatibility, segments with executable code can be marked as containing either 16-bit or 32-bit instructions. Special prefixes allow inclusion of 32-bit instructions in a 16-bit segment or vice versa.

64-bit

Starting with the AMD Opteron processor, the x86 in 64-bit long mode (as a subset of AMD64 or x86-64 mode) extended the 32-bit registers in a similar way that 32-bit protected mode did before it (RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP, RFLAGS, RIP). x86-64 is a Superset of the x86 instruction set architecture. x86-64 is a Superset of the x86 instruction set architecture. However, AMD also added 8 additional 64-bit general registers (R8, R9, . . . , R15). The addressing modes were not dramatically changed from 32-bit mode, except that addressing was extended to 64 bits, physical addressing is now sign extended (so memory always adds equally to the top and bottom of memory; note that this does not affect linear or virtual addressing), and other selector details have been dramatically reduced.

Miscellaneous/Special Purpose

x86 processors also include various special/miscellaneous registers such as control registers (CR0 through 4), debug registers (DR0 through 3, plus 6 and 7), test registers (TR4 through 7), descriptor registers (GDTR, LDTR, IDTR), and a task register (TR). A control register is a Processor register which changes or controls the general behavior of a CPU or other digital device Debug register is a register used by a processor for program Debugging. Test register was a register used by the processor usually to do a self-test

Purpose

Although the main registers are "general-purpose" and can be used for anything, it was envisaged that they be used for the following purposes:

No particular purposes were envisaged for the other 8 registers available only in 64-bit mode.

Some instructions compile and execute more efficiently when using these registers for their designed purpose. For example, using AL as an accumulator and adding an immediate byte value to it produces the efficient add to AL opcode of 04h, whilst using the BL register produces the generic and longer add to register opcode of 80C3h. In computer technology an opcode ( op eration code) is the portion of a Machine language instruction that specifies the operation to be performed

Structure

General Purpose Registers (A, B, C and D)

7 6 5 4 3 2 1 0
R?X
E?X
?X
?H ?L

Segment Registers (C, D, S, E, F, and G)

1 0
?S

Pointer Registers (S and B)

7 6 5 4 3 2 1 0
R?P
E?P
?P

Index Registers (S and D)

7 6 5 4 3 2 1 0
R?I
E?I
?I

Instruction Pointer Register (I)

7 6 5 4 3 2 1 0
R?P
E?P
?P

x86-64-only General Purpose Registers (R8, R9, R10, R11, R12, R13, R14, R15)

7 6 5 4 3 2 1 0
?
?D

Operating modes

Real mode

Main article: Real mode

Real mode is an operating mode of 80286 and later x86-compatible CPUs. Real mode, also called real address mode, is an operating mode of 80286 and later X86 -compatible CPUs. The Intel 286, introduced on February 1, 1982, (originally named 80286, and also called iAPX 286 in the programmer's manual Real mode is characterized by a 20 bit segmented memory address space (meaning that only 1 MiB of memory can be addressed), direct software access to BIOS routines and peripheral hardware, and no concept of memory protection or multitasking at the hardware level. A mebibyte (a contraction of me ga bi nary byte) is a unit of Information or Computer storage, abbreviated MiB. In Computing, the BIOS (ˈbaɪoʊs Memory protection is a way to control memory usage on a computer and is core to virtually every Operating system. In computing Multitasking is a method by which multiple tasks also known as processes, share common processing resources such as a CPU. All x86 CPUs in the 80286 series and later start up in real mode at power-on; 80186 CPUs and earlier had only one operational mode, which is equivalent to real mode in later chips. The Intel 286, introduced on February 1, 1982, (originally named 80286, and also called iAPX 286 in the programmer's manual The 80186 is a Microprocessor that was developed by Intel circa 1982.

In order to use more than 64 KiB of memory, the segment registers must be used. This created great complications for C compiler implementors who introduced odd pointer modes such as "near", "far" and "huge" to leverage the implicit nature of segmented architecture to different degrees, with some pointers containing 16-bit offsets within implied segments and other pointers containing segment addresses and offsets within segments.

Protected mode

Main article: Protected mode

In addition to real mode, the Intel 80286 supports protected mode, expanding addressable physical memory to 16 MiB and addressable virtual memory to 1 GiB, and providing protected memory, which prevents programs from corrupting one another. In computing protected mode, also called protected virtual address mode, is an operational mode of X86 -compatible Central processing units (CPU Computer data storage, often called storage or memory, refers to Computer components devices and recording media that retain digital A mebibyte (a contraction of me ga bi nary byte) is a unit of Information or Computer storage, abbreviated MiB. Virtual memory is a Computer system technique which gives an application program the impression that it has contiguous working memory while in fact it may be physically A gibibyte (a contraction of gi ga bi nary byte) is a unit of Information or Computer storage, abbreviated GiB. Memory protection is a way to control memory usage on a computer and is core to virtually every Operating system. This is done by using the segment registers only for storing an index to a segment table. There were two such tables, the Global Descriptor Table (GDT) and the Local Descriptor Table (LDT), each holding up to 8192 segment descriptors, each segment giving access to 64 KiB of memory. The Global Descriptor Table or GDT is a data structure used by Intel X86 -family processors starting with the 80286 in order to define the The Local Descriptor Table (LDT is a memory table used in the X86 architecture in Protected mode and containing memory Segment descriptors start in The segment table provided a 24-bit base address, which can be added to the desired offset to create an absolute address. In Computing, a base address is an Address serving as a reference point ("base" for other addresses Each segment can be assigned one of four ring levels used for hardware-based computer security. This article describes how security can be achieved through design and engineering

The Intel 80386 introduced support in protected mode for paging, a mechanism making it possible to use virtual memory. In Computer Operating systems that have their Main memory divided into pages, paging (sometimes called swapping) is a transfer Virtual memory is a Computer system technique which gives an application program the impression that it has contiguous working memory while in fact it may be physically

Paging and segmented memory access are required for modern multitasking operating systems. Linux, 386BSD and Windows NT were developed for the 386 because it was the first Intel architecture CPU to support paging and 32-bit segment offsets. Linux (commonly pronounced ˈlɪnəks 386BSD, sometimes called " JOLIX " is a free BSD Unix Operating system for PC compatible computer systems based Windows NT is a family of Operating systems produced by Microsoft, the first version of which was released in July 1993 The 386 architecture became the basis of all further development in the x86 series. The success of Windows 3.1, the first widely accepted version of Microsoft Windows, was largely due to its ability to take advantage of 386 features, even though it was used mainly to run multiple sessions rather than to take advantage of the native 32-bit instruction set. Microsoft Windows is a series of Software Operating systems and Graphical user interfaces produced by Microsoft. An instruction set is a list of all the instructions and all their variations that a processor can execute

x86 processors that support protected mode boot into real mode for backward compatibility with the older 8086 class of processors. Real mode, also called real address mode, is an operating mode of 80286 and later X86 -compatible CPUs. Upon power-on (aka booting), the processor initiates itself into Real mode, and then it begins loading programs automatically into RAM from ROM and disk. In Computing, booting ( booting up) is a bootstrapping process that starts Operating systems when the user turns on a Computer system A hard disk drive ( HDD) commonly referred to as a hard drive, hard disk, or fixed disk drive, is a Non-volatile storage device A program inserted somewhere along the boot sequence may be used to put the processor into the Protected mode. Computer programs (also software programs, or just programs) are instructions for a Computer. In Computing, booting ( booting up) is a bootstrapping process that starts Operating systems when the user turns on a Computer system In computing protected mode, also called protected virtual address mode, is an operational mode of X86 -compatible Central processing units (CPU The instruction set in protected mode is backward compatible with the one used in real mode.

Virtual 8086 mode

Further information: Virtual 8086 mode

There is also a sub-mode of operation in 32-bit Protected mode, called virtual 8086 mode. In the 80386 Microprocessor and later Virtual 8086 mode, also called virtual real mode or VM86, allows the execution of Real mode In the 80386 Microprocessor and later Virtual 8086 mode, also called virtual real mode or VM86, allows the execution of Real mode This is basically a special hybrid operating mode that allows real mode programs and operating systems to run while under the control of a Protected mode supervisor operating system. This allows for a great deal of flexibility in running both Protected mode programs and real mode programs simultaneously. This mode is available in the 32-bit version of Protected mode; virtual 8086 mode does not exist previously in the 16-bit version of Protected mode, or in the 64-bit long mode.

64-bit Long mode

Main article: x86-64

By 2002, it was obvious that the 32-bit address space of the x86 architecture was limiting its performance in applications requiring large data sets. x86-64 is a Superset of the x86 instruction set architecture. A 32-bit address space would allow the processor to directly address only 4 GiB of data, a size surpassed by applications such as video processing and database engines, while using the 64-bit address, one can directly address 16777216 TiB (more than 17 billion GiB) of data, although most 64-bit architectures don't support access to the full 64-bit address space (AMD64, for example, supports only 48 bits, split into 4 paging levels, from a 64-bit address). Video editing software is Application software which handles the editing of video sequences on a computer A database engine is the underlying software component that a Database management system (DBMS uses to create retrieve update and delete (see CRUD (acronym A tebibyte (a contraction of te ra bi nary byte) is a unit of Information or Computer storage, abbreviated TiB.

AMD, who would traditionally follow the lead of Intel, took the initiative of extending the 32-bit x86 architecture to 64-bit, initially calling it x86-64, later renaming it AMD64. '64-bit' CPUs have existed in Supercomputers since the 1960s and in RISC -based workstations and servers since the early 1990s. The Opteron, Athlon 64, Turion 64, and later Sempron families of processors use this architecture. The Opteron is AMD 's X86 server processor line and was the first processor to implement the AMD64 Instruction set architecture (known The Athlon 64 is an eighth-generation AMD64 architecture Microprocessor produced by AMD, released on Turion 64 is the Brand name AMD applies to its 64- Bit low-consumption ( mobile) processors Sempron has been the marketing name used by AMD for several different entry level desktop CPUs using several different technologies and CPU socket The success of the AMD64 line of processors coupled with the lukewarm reception of the IA-64 architecture prompted Intel to reverse-engineer and adopt the instruction set, adding new extensions of its own and branding it the EM64T architecture, and later re-branding it Intel 64.

In its literature and product version names, Microsoft and Sun refer to AMD64/Intel 64 collectively as x64 in the Windows and Solaris operating systems respectively. Solaris is a Unix -based Operating system introduced by Sun Microsystems in 1992 as the successor to SunOS. Linux distributions refer to it either as "x86-64", its variant "x86_64", or "amd64". Linux (commonly pronounced ˈlɪnəks BSD systems use "amd64" while Mac OS X uses "x86_64". Mac OS X (mæk oʊ ɛs tɛn is a line of computer Operating systems developed marketed and sold by Apple Inc, the latest of which is pre-loaded on all currently

Long mode is mostly an extension of the 32-bit instruction set, but unlike the 16–to–32-bit transition, many instructions were dropped in the 64 bit mode. This does not affect actual binary backward compatibility (which would execute legacy code in other modes that retain support for those instructions), but it changes the way assembler and compilers for new code have to work.

This was the first time that a major upgrade of the x86 architecture was initiated and originated by a manufacturer other than Intel. It was also the first time that Intel accepted technology of this nature from an outside source.

Extensions

Floating point unit

Further information: Floating point unit

Initially, IA-32 included floating-point capabilities only on add-on processors (8087, 80287 and 80387. A floating point unit (FPU is a part of a Computer system specially designed to carry out operations on Floating point numbers ) With the introduction of the 80486, these 8 80x87 floating point registers, known as ST(0) through ST(7) are built in to the CPU. Each register is 80 bits wide and stores numbers in the double extended precision format of the IEEE floating-point standard. The IEEE Standard for Binary Floating-Point Arithmetic ( IEEE 754) is the most widely-used standard for floating-point computation and is followed by many

These registers are not accessible directly, but are accessible like a LIFO stack. LIFO is an Acronym which stands for last in first out. In Computer science and Queueing theory this refers to the way items stored The register numbers are not fixed, but are relative to the top of the stack; ST(0) is the top of the stack, ST(1) is the next register below the top of the stack, ST(2) is two below the top of the stack, etc. That means that data is always pushed down from the top of the stack, and operations are always done against the top of the stack. So you couldn't just access any register randomly, it has to be done in the stack order.

MMX

Main article: MMX (instruction set)

MMX is a SIMD instruction set designed by Intel, introduced in 1997 for Pentium MMX microprocessors. MMX is a single instruction multiple data (SIMD Instruction set designed by Intel, introduced in 1997 in their Pentium line of In Computing, SIMD ( S ingle I nstruction M ultiple D ata is a technique employed to achieve data level parallelism as in a Vector The Pentium brand refers to Intel 's single-core x86 Microprocessor based on the P5 fifth-generation Microarchitecture. It developed out of a similar unit first used on the Intel i860. The Intel i860 (also 80860) was a RISC Microprocessor from Intel, first released in 1989. It first appeared in the Pentium MMX. The Pentium brand refers to Intel 's single-core x86 Microprocessor based on the P5 fifth-generation Microarchitecture. It is supported on most subsequent IA-32 processors by Intel and other vendors. MMX is typically used for video applications.

MMX added 8 new "registers" to the architecture, known as MM0 through MM7 (henceforth referred to as MMn). In reality, these new "registers" were just aliases for the existing x87 FPU stack registers. Hence, anything that was done to the floating point stack would also affect the MMX registers. Unlike the FP stack, these MMn registers were fixed, not relative, and therefore they were randomly accessible. The instruction set did not adopt the stack-like semantics so that existing operating systems could still correctly save and restore the register state when multitasking without modifications.

Each of the MMn registers are 64-bit integers. However, one of the main concepts of the MMX instruction set is the concept of packed data types, which means instead of using the whole register for a single 64-bit integer (quadword), two 32-bit integers (doubleword), four 16-bit integers (word) or eight 8-bit integers (byte) may be used. In computer science the term integer is used to refer to a Data type which represents some finite subset of the mathematical Integers These are also known as In computer science the term integer is used to refer to a Data type which represents some finite subset of the mathematical Integers These are also known as In computer science the term integer is used to refer to a Data type which represents some finite subset of the mathematical Integers These are also known as In computer science the term integer is used to refer to a Data type which represents some finite subset of the mathematical Integers These are also known as Also because the MMX's 64-bit MMn registers are aliased to the FPU stack, and each of the stack registers are 80-bit wide, the upper 16-bits of the stack registers go unused in MMX, and these bits are set to all ones, which makes it look like NaN's or infinities in the floating point view. This makes it easier to tell whether you are working on a floating point data or MMX data.

3DNow!

Main article: 3DNow!

In 1997 AMD introduced 3DNow! The introduction of this technology coincided with the rise of 3D entertainment applications and was designed to improve the CPU's vector processing performance of graphic-intensive applications. 3DNow! is the Trade name of a multimedia extension created by AMD for its processors starting with the K6-2 in 1998 3D computer graphics (in contrast to 2D computer graphics) are graphics that use a three-dimensional representation of geometric data that is stored in the computer A vector processor, or array processor, is a CPU design where the instruction set includes operations that can perform mathematical operations on multiple data 3D video game developers and 3D graphics hardware vendors use 3DNow! to enhance their performance on AMD's K6 and Athlon series of processors. The K6 microprocessor was launched by AMD in 1997 The main advantage of this particular microprocessor is that it was designed to fit into existing desktop designs for Athlon is the brand name applied to a series of different X86 processors designed and manufactured by AMD.

3DNow! was designed to be the natural evolution of MMX from integers to floating point. As such, it uses the exact same register naming convention as MMX, that is MM0 through MM7. The only difference is that instead of packing byte to quadword integers into these registers, one would pack single precision floating points into these registers. In Computing, single precision is a Computer numbering format that occupies one storage location in computer memory at a given address The advantage of aliasing registers with the FPU registers is that the same instruction and data structures used to save the state of the FPU registers can also be used to save 3DNow! register states. Thus no special modifications are required to be made to operating systems which would otherwise not know about.

SSE

In 1999, Intel introduced the Streaming SIMD Extensions (SSE) instruction set, following in 2000 with SSE2. S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 SSE2, Streaming SIMD Extensions 2, is one of the IA-32 SIMD (Single Instruction Multiple Data Instruction sets SSE2 was first introduced by SSE3, also known by its Intel code name Prescott New Instructions (PNI, is the third iteration of the SSE instruction set for the IA-32 architecture Supplemental Streaming SIMD Extension 3 ( SSSE3) is Intel 's name for the SSE instruction set's fourth iteration SSE4 is an Instruction set used in the Intel Core microarchitecture and AMD K10 (K8L. The SSE5 (short for Streaming SIMD Extensions version 5) announced by AMD on August 30 2007 is an extension to the 128-bit SSE core instructions An instruction set is a list of all the instructions and all their variations that a processor can execute The first addition made MMX almost obsolete and the second allowed the instructions to be realistically targeted by conventional compilers. Introduced in 2004 along with the Prescott revision of the Pentium 4 processor, SSE3 added specific memory and thread-handling instructions to boost the performance of Intel's HyperThreading technology. The Pentium 4 brand refers to Intel 's line of single- core mainstream desktop and Laptop Central processing units (CPUs introduced The Pentium 4 brand refers to Intel 's line of single- core mainstream desktop and Laptop Central processing units (CPUs introduced A thread in Computer science is short for a thread of execution. Hyper-threading (officially termed Hyper-Threading Technology or HTT) is an Intel-proprietary technology AMD licensed the SSE3 instruction set and implemented most of the SSE3 instructions for its revision E and later Athlon 64 processors. The Athlon 64 does not support HyperThreading and lacks those SSE3 instructions used only for HyperThreading.

SSE discarded all legacy connections to the FPU stack. This also meant that this instruction set discarded all legacy connections to previous generations of SIMD instruction sets like MMX. But it freed the designers up, allowing them to use larger registers, not limited by the size of the FPU registers. The designers created eight 128-bit registers, named XMM0 through XMM7. (Note: in AMD64, the number of SSE XMM registers has been increased from 8 to 16. x86-64 is a Superset of the x86 instruction set architecture. ) However, the downside was that operating systems had to have an awareness of this new set of instructions in order to be able to save their register states. So Intel created a slightly modified version of Protected mode, called Enhanced mode which enables the usage of SSE instructions, whereas they stay disabled in regular Protected mode. An OS that is aware of SSE will activate Enhanced mode, whereas an unaware OS will only enter into traditional Protected mode.

SSE is a SIMD instruction set that works only on floating point values, like 3DNow!. However, unlike 3DNow! it severs all legacy connection to the FPU stack. Because it has larger registers than 3DNow!, SSE can pack twice the number of single precision floats into its registers. In Computing, single precision is a Computer numbering format that occupies one storage location in computer memory at a given address The original SSE was limited to only single-precision numbers, like 3DNow!. The SSE2 introduced the capability to pack double precision numbers too, which 3DNow! had no possibility of doing since a double precision number is 64-bit in size which would be the full size of a single 3DNow! MMn register. In Computing, double precision is a Computer numbering format that occupies two adjacent storage locations in computer memory At 128-bit, the SSE XMMn registers could pack two double precision floats into one register. Thus SSE2 is much more suitable for scientific calculations than either SSE1 or 3DNow!, which were limited to only single precision. SSE3 does not introduce any additional registers.

Physical Address Extension (PAE)

By default, physical addresses are 32-bit, however, there exists a page extension mode called Physical Address Extension or PAE, first added in the Intel Pentium Pro, which allows an additional 4 bits of physical addressing. In Computing, Physical Address Extension ( PAE) refers to a feature of X86 and X86-64 processors that allows more than 4 Gigabytes ( In Computing, Physical Address Extension ( PAE) refers to a feature of X86 and X86-64 processors that allows more than 4 Gigabytes ( The Pentium Pro is a sixth-generation X86 -based Microprocessor developed and manufactured by Intel introduced in November 1995 The size of memory in Protected mode is usually limited to 4 GiB. A gibibyte (a contraction of gi ga bi nary byte) is a unit of Information or Computer storage, abbreviated GiB. Through tricks in the processor's page and segment memory management systems, x86 operating systems may be able to access more than 32-bits of address space, even without the switchover to the 64-bit paradigm. This mode does not change the length of segment offsets or linear addresses; those are still only 32 bits.

Virtualization

x86 virtualization is difficult because the architecture did not meet the Popek and Goldberg requirements until recently. In Computer science, a virtual machine (VM is a Software implementation of a machine (computer that executes programs like a real machine The Popek and Goldberg virtualization requirements are a set of sufficient conditions for a computer architecture to efficiently support system Virtualization. Nevertheless, there are several commercial x86 virtualization products, such as VMware, Parallels and Microsoft Virtual PC, as well as open source virtualization projects such as QEMU+KQEMU, VirtualBox. x86 virtualization is the method by which X86 -based "guest" operating systems are run under another "host" x86 operating system with little or no modification VMware Inc ( is a Software developer and a global leader in the Virtualization market Parallels Workstation is the first commercial software product released by Parallels Inc Microsoft Virtual PC is a Virtualization suite for Microsoft Windows Operating systems and an Emulation suite for Open source is a development methodology which offers practical accessibility to a product's source (goods and knowledge QEMU is a processor Emulator that relies on dynamic Binary translation to achieve a reasonable speed while being easy to port on new host CPU architectures QEMU is a processor Emulator that relies on dynamic Binary translation to achieve a reasonable speed while being easy to port on new host CPU architectures VirtualBox is an X86 virtualization software package originally created by German software company innotek now developed by Sun Microsystems as part Other methods, such as the Kernel-based Virtual Machine ("KVM"), require newer processors which provide more hardware support for virtualization. Kernel-based Virtual Machine (KVM is a Linux kernel Virtualization infrastructure

Intel and AMD have introduced x86 processors with hardware-based virtualization extensions that overcome the classical virtualization limitations of the x86 architecture. These extensions are known as Intel VT (IVT or simply VT) that was code named "Vanderpool," and AMD-V that was code named "Pacifica. x86 virtualization is the method by which X86 -based "guest" operating systems are run under another "host" x86 operating system with little or no modification x86 virtualization is the method by which X86 -based "guest" operating systems are run under another "host" x86 operating system with little or no modification " Although most modern x86 server-based and many modern x86 desktop-based processors include these extensions, the technology is generally considered immature at this point with most software-based virtualization outperforming these extensions. [9] This is expected to change as the technology matures.

See also

Footnotes

  1. ^ Unlike the microarchitecture (and the specific electronic and physical implementation) used for a specific chip design
  2. ^ Intel abandoned its "x86" naming scheme with the Pentium in 1993 (as numbers could not be trademarked). IA-32 ( Intel Architecture 32-bit) often generically called X86 or x86-32, is the Instruction set architecture of Intel x86 assembly language is the Assembly language for the X86 class of processors which includes Intel 's Pentium series and AMD The X86 Instruction set has undergone numerous changes over time x87 is a math-related instruction subset of the X86 architecture of processors. Real mode, also called real address mode, is an operating mode of 80286 and later X86 -compatible CPUs. Unreal mode, also big real mode, huge real mode, or flat real mode, is a variant of Real mode (PE=0 in which one or more data segment In the 80386 Microprocessor and later Virtual 8086 mode, also called virtual real mode or VM86, allows the execution of Real mode In computing protected mode, also called protected virtual address mode, is an operational mode of X86 -compatible Central processing units (CPU In the X86-64 Computer architecture, long mode is the mode where a 64-bit application (or Operating system) can access the 64-bit instructions x86-64 is a Superset of the x86 instruction set architecture. Itanium is the brand name for 64-bit Intel Microprocessors that implement the Intel Itanium architecture (formerly called IA-64) In Computer engineering, microarchitecture (sometime abbreviated to µarch or uarch is a description of the Electrical circuitry of a Computer, Central This generational and chronological list of Intel microprocessors attempts to present all of Intel 's processors from the pioneering 4-bit 4004 This article gives a list of Advanced Micro Devices (AMD Microprocessors, sorted by generation and release year This page lists x86 -compliant microprocessors sold by VIA Technologies, grouped by technical merits (cores within same group have much in common Manufacturers x86-compatible processors have been designed manufactured and sold by a number of companies including x86-processors for both regular PCs and In X86 architecture, an input/output base address is a Base address used for an I/O port. In Computer engineering, microarchitecture (sometime abbreviated to µarch or uarch is a description of the Electrical circuitry of a Computer, Central The Pentium brand refers to Intel 's single-core x86 Microprocessor based on the P5 fifth-generation Microarchitecture. However, the term x86 was already firmly established among technicians, compiler writers etc.
  3. ^ Intel's naming are IA-32 and Intel 64 (EM64T or IA-32e) for x86 and x86-64 respectively. IA-32 ( Intel Architecture 32-bit) often generically called X86 or x86-32, is the Instruction set architecture of Intel x86-64 is a Superset of the x86 instruction set architecture. x86-64 is a Superset of the x86 instruction set architecture. x86-64 is a Superset of the x86 instruction set architecture. x86-64 is a Superset of the x86 instruction set architecture. Likewise, AMD today prefers AMD64 over the x86-64 name they once introduced. x86-64 is a Superset of the x86 instruction set architecture. x86-64 is a Superset of the x86 instruction set architecture.
  4. ^ Linux* Kernel Compiling. Intel. Retrieved on 2007-09-04. Year 2007 ( MMVII) was a Common year starting on Monday of the Gregorian calendar in the 21st century. Events 476 - Romulus Augustus, last emperor of the Western Roman Empire, is deposed when Odoacer proclaims himself
  5. ^ Intel Web page search result for "x64". Retrieved on 2007-09-04. Year 2007 ( MMVII) was a Common year starting on Monday of the Gregorian calendar in the 21st century. Events 476 - Romulus Augustus, last emperor of the Western Roman Empire, is deposed when Odoacer proclaims himself
  6. ^ The embedded processor's market is populated by more than 20 different architectures, which, due to the price sensitivity, low power and hardware simplicity requirements, outnumber the x86. An instruction set is a list of all the instructions and all their variations that a processor can execute
  7. ^ Microprocessor Hall of Fame. Intel. Retrieved on 2007-08-11. Year 2007 ( MMVII) was a Common year starting on Monday of the Gregorian calendar in the 21st century. Events 2492 BC - Traditional date of the defeat of Bel by Hayk, progenitor and founder of the Armenian nation
  8. ^ It had a slower Floating point unit however, which is slightly ironic as Cyrix started out as a designer of fast Floating point units for x86 processors. A floating point unit (FPU is a part of a Computer system specially designed to carry out operations on Floating point numbers
  9. ^ A Comparison of Software and Hardware Techniques for x86 Virtualization

References

External links


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