In computing, "word" is a term for the natural unit of data used by a particular computer design. Computing is usually defined like the activity of using and developing Computer technology Computer hardware and software. A word is simply a fixed-sized group of bits that are handled together by the machine. A bit is a binary digit, taking a value of either 0 or 1 Binary digits are a basic unit of Information storage and communication The number of bits in a word (the word size or word length) is an important characteristic of a computer architecture. In Computer engineering, computer architecture is the conceptual design and fundamental operational structure of a Computer system
The size of a word is reflected in many aspects of a computer's structure and operation. The majority of the registers in the computer are usually word-sized. In Computer architecture, a processor register is a small amount of storage available on the CPU whose contents can be accessed more quickly than storage The typical numeric value manipulated by the computer is probably word sized. The amount of data transferred between the processing part of the computer and the memory system is most often a word. An address used to designate a location in memory often fits in a word.
Modern computers usually have a word size of 16, 32, or 64 bits. Many other sizes have been used in the past, including 8, 9, 12, 18, 24, 36, 39, 40, 48, and 60 bits; the slab is an example of an early word size. A slab or syllable is the primary unit of Memory in the NCR 315 Computer architecture from NCR Corporation. Some of the earliest computers were decimal rather than binary, typically having a word size of 10 or 12 decimal digits, and some early computers had no fixed word length at all. The decimal ( base ten or occasionally denary) Numeral system has ten as its base. The binary numeral system, or base-2 number system, is a Numeral system that represents numeric values using two symbols usually 0 and 1.
Sometimes the size of a word is defined to be a particular value for compatibility with earlier computers. In Technology, especially Computing (irrespective of platform a product is said to be backward compatible when it is able to take the place of an older product The most common microprocessors used in personal computers (for instance, the Intel Pentiums and AMD Athlons) are an example of this. A microprocessor incorporates most or all of the functions of a Central processing unit (CPU on a single Integrated A personal computer ( PC) is any Computer whose original sales price size and capabilities make it useful for individuals and which is intended to be operated The Pentium brand refers to Intel 's single-core x86 Microprocessor based on the P5 fifth-generation Microarchitecture. Athlon is the brand name applied to a series of different X86 processors designed and manufactured by AMD. Their IA-32 architecture is an extension of the original Intel 8086 design which had a word size of 16 bits. IA-32 ( Intel Architecture 32-bit) often generically called X86 or x86-32, is the Instruction set architecture of Intel The 8086 is a 16-bit Microprocessor chip designed by Intel and introduced on the market in 1978 which gave rise to the X86 architecture The IA-32 processors still support 8086 (x86) programs, so the meaning of "word" in the IA-32 context was kept the same, and is still said to be 16 bits, despite the fact that they at times (especially when the default operand size is 32-bit) operate largely like a machine with a 32 bit word size. See also X86 assembly language The generic term x86 refers to the most commercially successful Instruction set architecture in the history of Personal Similarly in the newer x86-64 architecture, a "word" is still 16 bits, although 64-bit ("quadruple word") operands may be more common. x86-64 is a Superset of the x86 instruction set architecture.
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Uses of words
Depending on how a computer is organized, units of the word size may be used for:
- Integer numbers – Holders for integer numerical values may be available in one or in several different sizes, but one of the sizes available will almost always be the word. In computer science the term integer is used to refer to a Data type which represents some finite subset of the mathematical Integers These are also known as The other sizes, if any, are likely to be multiples or fractions of the word size. The smaller sizes are normally used only for efficient use of memory; when loaded into the processor, their values usually go into a larger, word-sized holder.
- Floating point numbers – Holders for floating point numerical values are typically either a word or a multiple of a word. In Computing, floating point describes a system for numerical representation in which a string of digits (or Bits represents a Real number.
- Addresses – Holders for memory addresses must be of a size capable of expressing the needed range of values, but not be excessively large. Often the size used is that of the word, but it can also be a multiple or fraction of the word size.
- Registers – Processor registers are designed with a size appropriate for the type of data they hold, e. In Computer architecture, a processor register is a small amount of storage available on the CPU whose contents can be accessed more quickly than storage g. integers, floating point numbers, or addresses. Many computer architectures use "general purpose" registers that can hold any of several types of data; those registers are sized to allow the largest of any of those types, and typically that size is the word size of the architecture.
- Memory-processor transfer – When the processor reads from the memory subsystem into a register, or writes a register's value to memory, the amount of data transferred is often a word. In simple memory subsystems, the word is transferred over the memory data bus, which typically has a width of a word or half word. In Computer architecture, a bus is a subsystem that transfers data between computer components inside a Computer or between computers In memory subsystems that use caches, the word-sized transfer is the one between the processor and the first level of cache; at lower levels of the memory hierarchy larger transfers (which are a multiple of the word size) are normally used. In Computer science, a cache (kæʃ like "cash") is a collection of data duplicating original The Hierarchical arrangement of storage in current Computer architectures is called the memory hierarchy.
- Unit of address resolution – In a given architecture, successive address values designate successive units of memory; this unit is the unit of address resolution. In most computers, the unit is either a character (e. g. a byte) or a word. (A few computers have used bit resolution. ) If the unit is a word, then a larger amount of memory can be accessed using an address of a given size. On the other hand, if the unit is a byte, then individual characters can be addressed (i. e. selected during the memory operation).
- Instructions – Machine instructions are normally fractions or multiples of the architecture's word size. Machine code or machine language is a system of instructions and data executed directly by a Computer 's Central processing unit. This is a natural choice since instructions and data usually share the same memory subsystem. In Harvard architectures the word sizes of instructions and data need not be related. The Harvard architecture is a Computer architecture with physically separate storage and signal pathways for instructions and data
Word size choice
When a computer architecture is designed, the choice of a word size is of substantial importance. There are design considerations which encourage particular bit-group sizes for particular uses (e. g. for addresses), and these considerations point to different sizes for different uses. However, considerations of economy in design strongly push for one size, or a very few sizes related by multiples or fractions (submultiples) to a primary size. That preferred size becomes the word size of the architecture.
Character size is one of the influences on a choice of word size. For other uses see Character. In Computer and machine-based Telecommunications terminology a character is a unit of Before the mid-1960s, characters were most often stored in six bits; this allowed no more than 64 characters, so alphabetics were limited to upper case. Since it is efficient in time and space to have the word size be a multiple of the character size, word sizes in this period were usually multiples of 6 bits (in binary machines). A common choice then was the 36-bit word, which is also a good size for the numeric properties of a floating point format. Many early computers aimed at the scientific market had a 36- Bit word length.
After the introduction of the IBM System/360 design which used eight-bit characters and supported lower-case letters, the standard size of a character (or more accurately, a byte) became eight bits. International Business Machines Corporation abbreviated IBM and nicknamed "Big Blue", is a multinational Computer Technology The IBM System/360 ( S/360) is a Mainframe computer system family announced by IBM on April 7, 1964. A byte (pronounced "bite" baɪt is the basic unit of measurement of information storage in Computer science. Word sizes thereafter were naturally multiples of eight bits, with 16, 32, and 64 bits being commonly used.
Variable word architectures
Early machine designs included some that used what is often termed a variable word length. In this type of organization, a numeric operand had no fixed length but rather its end was detected when a character with a special marking was encountered. Such machines often used binary coded decimal for numbers. In Computing and electronic systems binary-coded decimal ( BCD) is an encoding for decimal numbers in which each digit is represented by its own binary This class of machines included the IBM 702, IBM 705, IBM 7080, IBM 7010, UNIVAC 1050, IBM 1401, and IBM 1620. The IBM 702 ( photos was announced September 25, 1953 and withdrawn October 1, 1954, but the first production model was not installed until The IBM 700/7000 series was a series of large scale ( mainframe) Computer systems made by IBM through The IBM 7080 was a Transistorized variable word length BCD computer in the IBM 700/7000 series commercial architecture line introduced in August 1961 that The IBM 700/7000 series was a series of large scale ( mainframe) Computer systems made by IBM through The UNIVAC 1050 was a variable wordlength (1 to 16 characters decimal and binary computer The IBM 1401, the first member of the IBM 1400 series, was a variable wordlength Decimal Computer that was announced by IBM on October The IBM 1620 was announced by IBM on October 21, 1959 and marketed as an inexpensive "scientific computer"
Most of these machines work on one unit of memory at a time and since each instruction or datum is several units long, each instruction takes several cycles just to access memory. These machines are often quite slow because of this. For example, instruction fetches on an IBM 1620 Model I take 8 cycles just to read the 12 digits of the instruction (the Model II reduced this to 6 cycles, but reduced the fetch times to 4 cycles if both address fields were not needed by the instruction). The IBM 1620 Model I was the original implementation of the IBM 1620 scientific computer introduced in 1959 The IBM 1620 Model II (commonly called simply the Model II was a vastly improved implementation compared to the original Model I, of the IBM 1620 scientific computer Instruction execution took a completely variable number of cycles, depending on the size of the operands.
Word and byte addressing
The memory model of an architecture is strongly influenced by the word size. In particular, the resolution of a memory address, that is, the smallest unit that can be designated by an address, has often been chosen to be the word. In this approach, address values which differ by one designate adjacent memory words. This is natural in machines which deal almost always in word (or multiple-word) units, and has the advantage of allowing instructions to use minimally-sized fields to contain addresses, which can permit a smaller instruction size or a larger variety of instructions.
When byte processing is to be a significant part of the workload, it is usually more advantageous to use the byte, rather than the word, as the unit of address resolution. This allows an arbitrary character within a character string to be addressed straightforwardly. A word can still be addressed, but the address to be used requires a few more bits than the word-resolution alternative. The word size needs to be an integral multiple of the character size in this organization. This addressing approach was used in the IBM 360, and has been the most common approach in machines designed since then.
The power of 2
Data values may occupy differing sizes of memory, because, for instance, some numbers need to be capable of having greater precision than others. The commonly used sizes are usually chosen to be a power of 2 multiple of the unit of address resolution (byte or word). In Mathematics, a power of two is any of the Integer powers of the number two; in other words two multiplied by itself a certain This is convenient because converting the index of an item in an array into the address of the item then requires only a shift operation (which is just a conductor routing in hardware) rather than a multiplication. In some cases this relationship can also avoid the use of division operations. As a result, most modern computer designs have word sizes (and other operand sizes) that are a power of 2 times the size of a byte.
Size families
As computer designs have grown more complex, the central importance of a single word size to an architecture has decreased. Although more capable hardware can use a wider variety of sizes of data, market forces exert pressure to maintain backward compatibility while extending processor capability. In Technology, especially Computing (irrespective of platform a product is said to be backward compatible when it is able to take the place of an older product As a result, what might have been the central word size in a fresh design has to coexist as an alternative size to the original word size in a backward compatible design. The original word size remains available in future designs, forming the basis of a size family.
A major example of this can be seen in the x86 designs. See also X86 assembly language The generic term x86 refers to the most commercially successful Instruction set architecture in the history of Personal The original 8086 architecture clearly used a word size of 16 bits. The 8086 is a 16-bit Microprocessor chip designed by Intel and introduced on the market in 1978 which gave rise to the X86 architecture The significantly-enhanced design of the 80386 added to the 8086 base an organization which was based around units of 32 bits. If it were an unencumbered design, it would have had a 32-bit word size, but as an extension of the 8086, its word size continued to be considered to be 16 bits. (As a result of this, one hears of the 80386 and successor processors as being "32-bit", but usually not as having a 32-bit word. ) This same situation has recently recurred in the same line, as the AMD64 architectural extensions bring the 64-bit size into a major position without dropping any of the 16- and 32-bit support. x86-64 is a Superset of the x86 instruction set architecture.
Thus one sees that today a computer architecture is based on a family of closely related sizes more than on a single omnipresent word size. The sizes are intimately related to one another by integral factors, usually a power of two. Calling any one of them the architecture's word size may be somewhat arbitrary, and a size may be so designated due to the history of the architecture's evolution rather than the properties of the size itself in a recent design.
Dword and Qword
In computer science, a dword (double word) is a unit of data that is twice the size of a word. On the x86 platforms, which have a word size of 16 bits, a dword unit of data is 32 bits long. See also X86 assembly language The generic term x86 refers to the most commercially successful Instruction set architecture in the history of Personal A bit is a binary digit, taking a value of either 0 or 1 Binary digits are a basic unit of Information storage and communication A bit is a binary digit, taking a value of either 0 or 1 Binary digits are a basic unit of Information storage and communication
A qword (or quadword, or quadruple word) is a unit of data that is four times the size of a word. On the common x86 platforms, this unit of data is 64 bits because the size of a word on an x86 system is defined to be 16 bits (whether the particular machine works primarily with 16, 32, or 64 bit items).
Finally, Intel uses the term double quadruple word, or DQWord, to denote a 128-bit datum, found in the implementation of Streaming SIMD Extensions and its ancestors. S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 Microsoft Macro Assembler uses oword (octuple word) for the same data size. The Microsoft Macro Assembler (abbreviated MASM) is an x86 High-level assembler for DOS and Microsoft Windows.
Table of word sizes
| Year | Computer Architecture |
Word Size w |
Integer Sizes |
Floating Point Sizes |
Instruction Sizes |
Unit of Address Resolution |
Char Size |
|---|---|---|---|---|---|---|---|
| "1837" | Babbage Analytical engine |
50 d | w | – | 5 different cards were used for different functions, exact size of cards not known | w | – |
| 1941 | Zuse Z3 | 22 b | – | w | 8 b | w | – |
| 1942 | ABC | 50 b | w | – | – | – | – |
| 1944 | Harvard Mark I | 23 d | w | – | 24 b | – | – |
| 1946 (1948) {1953} |
ENIAC (w/Panel #16) {w/Panel #26} |
10 d | w, 2w (w) {w} |
– | – (2d, 4d, 6d, 8d) {2d, 4d, 6d, 8d} |
– – {w} |
– |
| 1951 | UNIVAC I | 12 d | w | – | ½w | w | 1 d |
| 1952 | IAS machine | 40 b | w | – | ½w | w | 5 b |
| 1952 | IBM 701 | 36 b | ½w, w | – | ½w | ½w, w | 6 b |
| 1952 | UNIVAC 60 | n d | 1d, . The analytical engine, an important step in the History of computers, was the design of a mechanical general-purpose Computer by the British mathematician Charles Konrad Zuse 's The Atanasoff–Berry Computer ( ABC) was the first electronic Digital Computing device The IBM Automatic Sequence Controlled Calculator ( ASCC) called the Mark I by Harvard University, was the first large-scale automatic digital ENIAC, short for Electronic Numerical Integrator And Computer, was the first general-purpose electronic Computer. The UNIVAC I ( U N I V ersal A utomatic C omputer I) was the first commercial computer made in the United States The IAS machine was the first electronic digital Computer built by the Institute for Advanced Study (IAS, Princeton NJ, USA. The IBM 701, known as the Defense Calculator while in development was announced to the public on April 29, The Remington Rand 409 Plug-board programmed Punch card calculator designed in 1949, was sold in two models the UNIVAC 60 ( . . 10d | – | – | – | 2d, 3d |
| 1953 | IBM 702 | n d | 0d, . The IBM 702 ( photos was announced September 25, 1953 and withdrawn October 1, 1954, but the first production model was not installed until . . 511d | – | 5d | d | 1 d |
| 1953 | UNIVAC 120 | n d | 1d, . The Remington Rand 409 Plug-board programmed Punch card calculator designed in 1949, was sold in two models the UNIVAC 60 ( . . 10d | – | – | – | 2d, 3d |
| 1954 (1955) |
IBM 650 (w/IBM 653) |
10 d | w | – (w) |
w | w | 2 d |
| 1954 | IBM 704 | 36 b | w | w | w | w | 6 b |
| 1954 | IBM 705 | n d | 0d, . The IBM 650 ( photo was one of IBM ’s early Computers and the world’s first mass-produced ( photo computer The IBM 704, the first mass-produced Computer with Floating point arithmetic hardware was introduced by IBM in April 1954. The IBM 700/7000 series was a series of large scale ( mainframe) Computer systems made by IBM through . . 255d | – | 5d | d | 1 d |
| 1954 | IBM NORC | 16 d | w | w, 2w | w | w | – |
| 1956 | IBM 305 | n d | 1d, . The IBM Naval Ordnance Research Calculator ( NORC) was a one-of-a-kind first-generation ( Vacuum tube) electronic Computer built by IBM for the The IBM 305 RAMAC was the first commercial computer that used a moving head hard disk drive (magnetic Disk storage) for Secondary storage. . . 100d | – | 10d | d | 1 d |
| 1957 | Autonetics Recomp I | 40 b | w, 79 b, 8d, 15d | – | ½w | ½w, w | 5 b |
| 1958 | UNIVAC II | 12 d | w | – | ½w | w | 1 d |
| 1958 | SAGE | 32 b | ½w | – | w | w | 6 b |
| 1958 | Autonetics Recomp II | 40 b | w, 79 b, 8d, 15d | 2w | ½w | ½w, w | 5 b |
| 1959 | IBM 1401 | n d | 1d, . The UNIVAC II was an improvement to the UNIVAC I that UNIVAC first delivered in 1958. The Semi-Automatic Ground Environment ( SAGE) was an automated control system for tracking and intercepting enemy Bomber aircraft used by NORAD from The Autonetics Recomp II was introduced by the Autonetics division of North American Aviation in 1958. The IBM 1401, the first member of the IBM 1400 series, was a variable wordlength Decimal Computer that was announced by IBM on October . . | – | d, 2d, 4d, 5d, 7d, 8d | d | 1 d |
| 1959 (TBD) |
IBM 1620 | n d | 2d, . The IBM 1620 was announced by IBM on October 21, 1959 and marketed as an inexpensive "scientific computer" . . | – (4d, . . . 102d) |
12d | d | 2 d |
| 1960 | LARC | 12 d | w, 2w | w, 2w | w | w | 2 d |
| 1960 | CDC 1604 | 48 b | w | w | ½w | w | 6 b |
| 1960 | IBM 1410 | n d | 1d, . The UNIVAC LARC ( Livermore Advanced Research Computer) was Remington Rand's first attempt at building a Supercomputer. The CDC 1604 was a 48-bit computer designed and manufactured by Seymour Cray and his team at the Control Data Corporation. The IBM 1410, a member of the IBM 1400 series, was a variable wordlength decimal computer that was announced by IBM on . . | – | d, 2d, 6d, 7d, 11d, 12d | d | 1 d |
| 1960 | IBM 7070 | 10 d | w | w | w | w, d | 2 d |
| 1960 | PDP-1 | 18 b | w | – | w | w | 6 b |
| 1961 | IBM 7030 (Stretch) |
64 b | 1b, . IBM 7070 was a decimal architecture intermediate data processing system that was introduced by IBM in June 1960 The PDP-1 ( P rogrammed D ata P rocessor- 1) was the first Computer in Digital Equipment Corporation 's The IBM 7030, also known as Stretch, was IBM 's first Transistorized Supercomputer. . . 64b, 1d, . . . 16d |
w | ½w, w | b, ½w, w | 1 b, . . . 8 b |
| 1961 | IBM 7080 | n d | 0d, . The IBM 7080 was a Transistorized variable word length BCD computer in the IBM 700/7000 series commercial architecture line introduced in August 1961 that . . 255d | – | 5d | d | 1 d |
| 1962 | UNIVAC III | 25 b, 6 d | w, 2w, 3w, 4w | – | w | w | 6 b |
| 1962 | Autonetics D-17B Minuteman I Guidance Computer |
27 b | 11 b, 24 b | – | 24 b | w | – |
| 1962 | UNIVAC 1107 | 36 b | 1/6w, ⅓w, ½w, w | w | w | w | 6 b |
| 1962 | IBM 7010 | n d | 1d, . The UNIVAC III, designed as an improved Transistorized replacement for the Vacuum tube UNIVAC I and UNIVAC II computers was introduced in June The D-17B is a computer used in missile guidance systems specifically the Minuteman I NS-1OQ missile guidance system which contains a D-17B computer the associated stable The LGM-30 Minuteman is a United States nuclear Missile, a land-based Intercontinental ballistic missile (ICBM The UNIVAC 1107 was the first member of Sperry Rand 's UNIVAC 1100 series of computers introduced in October 1962. The IBM 700/7000 series was a series of large scale ( mainframe) Computer systems made by IBM through . . | – | d, 2d, 6d, 7d, 11d, 12d | d | 1 d |
| 1962 | IBM 7094 | 36 b | w | w, 2w | w | w | 6 b |
| 1963 | Gemini Guidance Computer | 39 b | 26 b | – | 13 b | 13 b, 26 b | – |
| 1963 (1966) |
Apollo Guidance Computer | 15 b | w | – | w, 2w | w | – |
| 1963 | Saturn Launch Vehicle Digital Computer | 26 b | w | – | 13 b | w | – |
| 1964 | CDC 6600 | 60 b | w | w | ¼w, ½w | w | 6 b |
| 1964 | Autonetics D-37C Minuteman II Guidance Computer |
27 b | 11 b, 24 b | – | 24 b | w | 4 b, 5 b |
| 1965 | IBM 360 | 32 b | ½w, w, 1d, . The IBM 7090 was a second-generation Transistorized version of the earlier IBM 709 vacuum tube Mainframe computers and was designed for "large-scale The Saturn Launch Vehicle Digital Computer (LVDC was one of the major components of the Instrument Unit fitted to the S-IVB stage of the Saturn V and The CDC 6600 was a Mainframe computer from Control Data Corporation, first delivered in 1964. The D-37C is the computer component of the all-inertial NS-17 Missile Guidance Set (MGS for accurately navigating to its target thousands of miles away The LGM-30 Minuteman is a United States nuclear Missile, a land-based Intercontinental ballistic missile (ICBM The IBM System/360 ( S/360) is a Mainframe computer system family announced by IBM on April 7, 1964. . . 16d |
w, 2w | ½w, w, 1½w | 8 b | 8 b |
| 1965 | UNIVAC 1108 | 36 b | 1/6w, ¼w, ⅓w, ½w, w, 2w | w, 2w | w | w | 6 b, 9 b |
| 1965 | PDP-8 | 12 b | w | – | w | w | 8 b |
| 1970 | PDP-11 | 16 b | w | 2w, 4w | w, 2w, 3w | 8 b | 8 b |
| 1971 | Intel 4004 | 4 b | w, d | – | 2w, 4w | w | – |
| 1972 | Intel 8008 | 8 b | w, 2d | – | w, 2w, 3w | w | 8 b |
| 1972 | Calcomp 900 | 9 b | w | – | w, 2w | w | 8 b |
| 1974 | Intel 8080 | 8 b | w, 2w, 2d | – | w, 2w, 3w | w | 8 b |
| 1975 | ILLIAC IV | 64 b | w | w, ½w | w | w | – |
| 1975 | Motorola 6800 | 8 b | w, 2d | – | w, 2w, 3w | w | 8 b |
| 1975 | MOS Tech. 6501 MOS Tech. 6502 |
8 b | w, 2d | – | w, 2w, 3w | w | 8 b |
| 1976 | Cray-1 | 64 b | 24 b, w | w | ¼w, ½w | w | 8 b |
| 1976 | Zilog Z80 | 8 b | w, 2w, 2d | – | w, 2w, 3w, 4w, 5w | w | 8 b |
| 1978 (1980) |
Intel 8086 (w/Intel 8087) |
16 b | ½w, w, 2d (w, 2w, 4w) |
– (2w, 4w, 5w, 17d) |
½w, w, . The UNIVAC 1108 was the second member of Sperry Rand 's UNIVAC 1100 series of computers introduced in 1964. The PDP-8 was the first successful commercial Minicomputer, produced by Digital Equipment Corporation (DEC in the 1960s The PDP-11 was a series of 16-bit Minicomputers sold by Digital Equipment Corp The Intel 4004 is a 4-bit Central processing unit (CPU released by Intel Corporation in 1971 The Intel 8008 was an early byte-oriented Microprocessor designed and manufactured by Intel and introduced in April 1972 The Intel 8080 was an early Microprocessor designed and manufactured by Intel. ILLIAC IV was one of the most infamous Supercomputers ever in a series of research machines ILLIACs, from the University of Illinois. The 6800 is an 8-bit Microprocessor produced by Motorola and released shortly after the Intel 8080 in late 1974 The 6501 is an Eight-bit Microprocessor, the first sold by MOS Technology. The MOS Technology 6502 is an 8-bit Microprocessor that was designed by Chuck Peddle for MOS Technology in 1975 The Cray-1 was a Supercomputer designed by a team including Seymour Cray for Cray Research. The Zilog Z80 is an 8-bit Microprocessor designed and sold by Zilog from July 1976 onwards The 8086 is a 16-bit Microprocessor chip designed by Intel and introduced on the market in 1978 which gave rise to the X86 architecture The 8087 was the first math Coprocessor for 16 bit processors designed by Intel (the I8231 was older but designed for the 8 bit Intel 8080) . . 7w | 8 b | 8 b |
| 1978 | VAX-11/780 | 32 b | ¼w, ½w, w, 1d, . Name "VAX" was originally an Acronym for V irtual A ddress e' X' tension, both because the VAX was seen as a 32-bit . . 31d, 1b, . . . 32b | w, 2w | ¼w, . . . 14¼w | 8 b | 8 b |
| 1979 | Motorola 68000 | 32 b | ¼w, ½w, w, 2d | – | ½w, w, . The Motorola 68000 is a 16/32-bit CISC Microprocessor core designed and marketed by Freescale Semiconductor (formerly Motorola Semiconductor . . 7½w | 8 b | 8 b |
| 1982 (1983) |
Motorola 68020 (w/Motorola 68881) |
32 b | ¼w, ½w, w, 2d | – (w, 2w, 2½w) |
½w, w, . The Motorola 68020 is a 32-bit Microprocessor from Motorola, released in 1984. Motorola 68881 was a Floating-point Coprocessor chip that was utilized in some computer systems that used the 68020 or 68030 . . 7½w | 8 b | 8 b |
| 1985 | ARM1 | 32 b | w | – | w | 8 b | 8 b |
| 1985 | MIPS | 32 b | ¼w, ½w, w | w, 2w | w | 8 b | 8 b |
| 1989 | Intel 80486 | 16 b | ½w, w, 2d w, 2w, 4w |
2w, 4w, 5w, 17d | ½w, w, . The ARM architecture (previously the Advanced RISC Machine, and prior to that Acorn RISC Machine) is a 32-bit RISC processor architecture MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies The Intel 486, otherwise known as the 80486 i486 or just 486 was the first tightly pipelined X86 design . . 7w | 8 b | 8 b |
| 1989 | Motorola 68040 | 32 b | ¼w, ½w, w, 2d | w, 2w, 2½w | ½w, w, . The Motorola 68040 is a Microprocessor from Motorola, released in 1990. . . 7½w | 8 b | 8 b |
| 1991 | Alpha | 64 b | ¼w, ½w, w | w, 2w | ½w | 8 b | 8 b |
| 1991 | Cray C90 | 64 b | w | ½w, w, 2w | w | w | 8 b |
| 1991 | PowerPC | 32 b | ¼w, ½w, w | w, 2w | w | 8 b | 8 b |
| 2000 | IA-64 | 64 b | 8 b, ¼w, ½w, w | ½w, w | 41 b | 8 b | 8 b |
| 2002 | XScale | 32 b | w | w, 2w | ½w, w | 8 b | 8 b |
| key: b: bits, d: decimal digits, w: word size of architecture, n: variable size | |||||||
See also
References
- Gerrit A. Alpha, originally known as Alpha AXP, was a 64-bit Reduced instruction set computer (RISC Instruction set architecture (ISA developed Cray Inc ( is a Supercomputer manufacturer based in Seattle Washington. PowerPC is a RISC Instruction set architecture created by the 1991 Apple – IBM – Motorola alliance known as AIM Itanium is the brand name for 64-bit Intel Microprocessors that implement the Intel Itanium architecture (formerly called IA-64) The XScale, a microprocessor core, is Marvell 's (formerly Intel 's implementation of the fifth generation of the ARM architecture, and consists A byte (pronounced "bite" baɪt is the basic unit of measurement of information storage in Computer science. The range of Integer values that can be stored in 32 bits is 0 through 4294967295 or −2147483648 through 2147483647 using Two's complement encoding A 32-bit application is Software that runs in a 32-bit flat Address space (a Flat memory model) '64-bit' CPUs have existed in Supercomputers since the 1960s and in RISC -based workstations and servers since the early 1990s. Blaauw & Frederick P. Brooks, Computer Architecture: Concepts and Evolution (Addison-Wesley, 1997, ISBN 0-201-10557-8)
- Anthony Ralston & Edwin D. Reilly, Encyclopedia of Computer Science Third Edition (Van Nostrand Reinhold, 1993, ISBN 0-442-27679-6)
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