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The SuperH (or SH) is brandname of a certain microcontroller and microprocessor architecture. A microcontroller (also MCU or µC is a functional Computer system-on-a- chip. A microprocessor incorporates most or all of the functions of a Central processing unit (CPU on a single Integrated The SuperH is fundamentally a 32-bit load/store RISC architecture found in a large number of embedded systems. The range of Integer values that can be stored in 32 bits is 0 through 4294967295 or −2147483648 through 2147483647 using Two's complement encoding An embedded system is a special-purpose Computer system designed to perform one or a few dedicated functions often with Real-time computing constraints

Contents

History

The SuperH processor core family was first developed by Hitachi in the early 1990s. () is a Multinational corporation specializing in high-technology and services headquartered in Marunouchi Itchome Chiyoda, Tokyo, Japan. Many microcontrollers and microprocessors were based on this architecture.

Hitachi was developing a complete set of instruction set upward compatible CPU cores. An instruction set is a list of all the instructions and all their variations that a processor can execute Originally, the SH-1 and the SH-2 were used in the Sega Saturn and Sega 32X and then later in many other microcontrollers used in many other embedded applications. The is a 32-bit Video game console that was first released on November 22 1994 in Japan, May 11 1995 in North America The Sega 32X ( Japanese: セガ スーパー32X codenamed Project Mars is an add-on for the Sega Mega Drive Video game console by Sega These cores use a 16-bit instruction set, though register length and data paths are 32-bit, which gave it an excellent code density without compromising the high performance of the CPU.

A few years later, the SH-3 core was added to this family of CPU cores extending the original cores mainly by another interrupt concept, a memory management unit (MMU) and a modified cache concept. A memory management unit ( MMU) sometimes called paged memory management unit ( PMMU) is a Computer hardware component responsible for handling The SH-3 core also got a DSP extension, then called SH-3-DSP core. Digital signal processing ( DSP) is concerned with the representation of the signals by a sequence of numbers or symbols and the processing of these signals With extended data paths for efficient DSP processing, special accumulators and a dedicated MAC-type DSP engine, this core was unifying the DSP and the RISC processor world. A derivative was also used with the original SH-2 core.

For the Sega Dreamcast, Hitachi was then developing the SH-4 architecture. The is Sega 's most recent Video game console and the successor to the Sega Saturn. () is a Multinational corporation specializing in high-technology and services headquartered in Marunouchi Itchome Chiyoda, Tokyo, Japan. This was a massive extension of the previous cores. Superscalar (2-way) instruction execution and a parallel vector floating point unit were the highlights of this architecture. A superscalar CPU architecture implements a form of parallelism called Instruction-level parallelism within a single processor Parallel computing is a form of computation in which many instructions are carried out simultaneously operating on the principle that large problems can often A vector processor, or array processor, is a CPU design where the instruction set includes operations that can perform mathematical operations on multiple data A floating point unit (FPU is a part of a Computer system specially designed to carry out operations on Floating point numbers This CPU core was then also used in many chipsets for embedded applications requiring a very high performance. SH-4 based standard chips were roughly introduced around 1998.

A bit later, Hitachi and ST Microelectronics formed the IP company SuperH, Inc which was going to license the SH-4 core to other companies and was developing the SH-5 architecture, the first move of SuperH into the 64-bit area. () is a Multinational corporation specializing in high-technology and services headquartered in Marunouchi Itchome Chiyoda, Tokyo, Japan. STMicroelectronics (,)is an franco-italian Electronics and Semiconductor manufacturer headquartered in in Geneva, Switzerland. Patent holding companies are companies set up to administer consolidate and license Patents or otherwise enforce patent rights such as through litigation SuperH, Inc. sold the IP of these CPU cores.

The SH-5 design supported two modes of operation. SHcompact mode is equivalent to the user-mode instructions of the SH-4 instruction set. SHmedia mode is very different, using 32-bit instructions with sixty-four 64-bit integer registers and SIMD instructions. In Computing, SIMD ( S ingle I nstruction M ultiple D ata is a technique employed to achieve data level parallelism as in a Vector In SHmedia mode the destination of a branch (jump) is loaded into a branch register separately from the actual branch instruction. A branch (or jump on some Computer architectures, such as the PDP-8 and Intel x86) is a point in a Computer program where the This allows the processor to prefetch instructions for a branch without having to snoop the instruction stream. The combination of a compact 16-bit instruction encoding with a more powerful 32-bit instruction encoding is not unique to SH-5; recent ARM processors have a 16-bit Thumb mode, and MIPS processors have a MIPS-16 mode. The ARM architecture (previously the Advanced RISC Machine, and prior to that Acorn RISC Machine) is a 32-bit RISC processor architecture MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies However, SH-5 differs because its backward compatibility mode is the 16-bit encoding rather than the 32-bit encoding.

After that, the evolution of the SuperH architecture still continued. The next evolutionary step happened around 2003 where the cores from SH-2 up to SH-4 were getting unified into a superscalar SH-X core which forms a kind of instruction set superset of the previous architectures.

Today, the SuperH CPU cores, architecture and products are with Renesas Technology, a merger of the Hitachi and Mitsubishi semiconductor groups and the architecture is consolidated around the SH2, SH2A, SH3, SH4 and SH4A platforms giving a scalable family from a small low cost solution through numerous options up to the highest possbile performance. is a Japanese semiconductor manufacturer They are based in Tokyo and have manufacturing design and sales operations in around 20 countries with about 26200 employees worldwide

See further details under Renesas.

Models

Hitachi SH-3 CPU
Hitachi SH-3 CPU

The family of SuperH CPU cores include:


The SuperH cores are supported worldwide by many RTOS and tool vendors. A real-time operating system ( RTOS; generally pronounced as "are-toss" is a multitasking Operating system intended for real-time

SH2

The SH2 is a modern-day high-performance 32bit RISC architecture, it features many (16) general purpose registers, ideal for when programs are written in C. tags please moot on the talk page first! --> In Computing, C is a general-purpose cross-platform block structured

It has a 16bit fixed length instructions for high code density, features a hardware Multiply-Accumulate (MAC) block for DSP algorithms and has a five-stage pipeline.

The SH2 has a cache on all ROM-less devices.

It also features many nice little features such as vector-base-register, global-base-register and a procedure register.

Today the SH2 family stretches from 32k of on board flash up to ROMless devices. It has a wide portfolio of different devices with differing peripherals such as CAN, Ethernet, motor-control timer unit, fast ADC and more.

SH2A

The SH2A is essentially an upgrade to the SH2 core. It extends the compatibility of the SuperH family up to the 200 MHz performance. Announced in early 2008 was the first dual core SH2A device enhancing the performance of this popular family.

At launch in 2007 the SH2A bases SH7211 was the world's fastest embedded flash microcontroller running at 160 MHz. It has later been superseded by several newer SuperH devices running at up to 200 MHz.

New features on the SH2A core include:

The SH2A family today spans a wide memory field from 256k up to and includes many ROMless variations. The devices feature many standard peripherals such as CAN, Ethernet, USB, LCD controllers, and many more as well as more application specific peripherals such as motor control timers, TFT controllers and peripherals dedicated to automotive powertrain applications. Ethernet is a family of frame -based Computer networking technologies for Local area networks (LANs A motor skill is generally agreed as a learned skill that involves voluntary movement to complete a task

Distinctions


Tools

RSK Renesas Starter Kit

Several Modern Day SuperH devices are available with a Renesas Starter Kit. The RSKs have been designed to allow easy access to all on chip peripherals and includes a debug LCD panel.

To complete the RSK, Renesas has included the "E10A for starter kits" or the "E8A" on chip debugger, 60 day (256K code size limited) trial compiler. This makes the RSK one of the most comprehensive and complete evaluation / development systems in its class.




Debuggers

RTOS

One of the key advantages of the SuperH is that is supported by so many Operating systems. A real-time operating system ( RTOS; generally pronounced as "are-toss" is a multitasking Operating system intended for real-time Below is a selection of some of the RTOSs that are available for the SuperH

External links

Linux for SuperH

Linux distributions for SuperH

NetBSD on SuperH

OpenBSD on SuperH

The Gentoo Linux Operating system (ˈdʒɛntuː is a Linux distribution based on the Portage Package management system. T2 is a flexible Open Source System Development Environment (SDE that facilitates the automated creation of Linux-based systems NetBSD is a freely redistributable Open source version of the Unix -derivative Berkeley Software Distribution (BSD Computer Operating OpenBSD is a Unix-like computer Operating system descended from Berkeley Software Distribution (BSD a Unix derivative developed at the
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