Pentium III Central processing unit
Produced:	From early 1999 to 2003
Manufacturer:	Intel
Max CPU clock:	450 MHz to 1. The hertz (symbol Hz) is a measure of Frequency, informally defined as the number of events occurring per Second. 4 GHz
FSB speeds:	100 MHz to 133 MHz
Min feature size:	0. The hertz (symbol Hz) is a measure of Frequency, informally defined as the number of events occurring per Second. In Personal computers the Front Side Bus ( FSB) is the bus that carries data between the CPU and the northbridge. The hertz (symbol Hz) is a measure of Frequency, informally defined as the number of events occurring per Second. The hertz (symbol Hz) is a measure of Frequency, informally defined as the number of events occurring per Second. 25 Âµm to 0. A micrometre ( American spelling: micrometer; symbol µm) is one millionth of a Metre, or equivalently one thousandth of a Millimetre 13 Âµm
Instruction set:	x86 (686)
Microarchitecture:	P6
Cores:	1
Sockets: Slot 1 Socket 370
Core names: Katmai Coppermine Coppermine-T Tualatin

Pentium III logo

Pentium III-M Logo

The Pentium III^[1] brand refers to Intel's 32-bit x86 desktop and mobile microprocessors (with the sixth-generation Intel P6 microarchitecture) introduced on February 26, 1999. An instruction set is a list of all the instructions and all their variations that a processor can execute In Computer engineering, microarchitecture (sometime abbreviated to µarch or uarch is a description of the Electrical circuitry of a Computer, Central The P6 Microarchitecture is the sixth generation Intel X86 Microprocessor architecture released in 1995. A multi-core processor (or chip-level multiprocessor, CMP) combines two or more independent cores into a single package composed of a single Integrated Slot 1 refers to the physical and electrical specification for the connector used by some of Intel 's microprocessors including the Celeron, Pentium II Socket 370 (also known as the PGA370 socket) is a common format of CPU socket first used by Intel for Pentium III and Celeron The range of Integer values that can be stored in 32 bits is 0 through 4294967295 or −2147483648 through 2147483647 using Two's complement encoding See also X86 assembly language The generic term x86 refers to the most commercially successful Instruction set architecture in the history of Personal A microprocessor incorporates most or all of the functions of a Central processing unit (CPU on a single Integrated The P6 Microarchitecture is the sixth generation Intel X86 Microprocessor architecture released in 1995. In Computer engineering, microarchitecture (sometime abbreviated to µarch or uarch is a description of the Electrical circuitry of a Computer, Central Events 747 BC - Epoch (origin of Ptolemy 's Nabonassar Era 364 - Valentinian I is proclaimed Year 1999 ( MCMXCIX) was a Common year starting on Friday (link will display full 1999 Gregorian calendar) The initial Katmai Pentium III contained 9. 5 million transistors. The brand's initial processors were very similar to the earlier CPUs branded Pentium II. The Pentium II brand refers to Intel 's sixth-generation Microarchitecture (" Intel P6 " and x86 -compatible Microprocessors The most notable difference was the addition of the SSE instruction set (to accelerate media processing and 3D graphics), and the introduction of a controversial serial number embedded in the chip during the manufacturing process. S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 An instruction set is a list of all the instructions and all their variations that a processor can execute

Similarly to the Pentium II it superseded, the Pentium III was also accompanied by the Celeron brand for lower-end CPU versions, and the Xeon for high-end (server and workstation) derivatives. The Pentium II brand refers to Intel 's sixth-generation Microarchitecture (" Intel P6 " and x86 -compatible Microprocessors The Celeron brand is a range of X86 CPUs from Intel targeted at budget/value Personal computers €”with the motto "delivering great quality The Xeon brand refers to many families of Intel 's x86 Multiprocessing CPUs – for dual-processor (DP and multi-processor (MP configuration The Pentium III was eventually superseded by the Pentium 4, but its Tualatin core also served as the basis for the Pentium M CPUs, which used many ideas from the Intel P6 microarchitecture. The Pentium 4 brand refers to Intel 's line of single- core mainstream desktop and Laptop Central processing units (CPUs introduced Pentium III variants Katmai The first Pentium III variant was the Katmai (Intel product code 80525 Overview The Pentium M represented a new and radical departure for Intel as it was not a low-power version of the desktop-oriented Pentium 4, but instead a heavily modified The P6 Microarchitecture is the sixth generation Intel X86 Microprocessor architecture released in 1995. In Computer engineering, microarchitecture (sometime abbreviated to µarch or uarch is a description of the Electrical circuitry of a Computer, Central Subsequently, it was the P-M microarchitecture of Pentium M branded CPUs, and not the NetBurst found in Pentium 4 processors, that formed the basis for Intel's energy-efficient Intel Core microarchitecture of CPUs branded Core 2, Pentium Dual-Core, Celeron (Core), and Xeon. In Computer engineering, microarchitecture (sometime abbreviated to µarch or uarch is a description of the Electrical circuitry of a Computer, Central Overview The Pentium M represented a new and radical departure for Intel as it was not a low-power version of the desktop-oriented Pentium 4, but instead a heavily modified The Intel NetBurst Microarchitecture, called P68 inside Intel was the successor to the P6 microarchitecture in the X86 family of CPUs The Pentium 4 brand refers to Intel 's line of single- core mainstream desktop and Laptop Central processing units (CPUs introduced The Intel Core microarchitecture (previously known as the Intel Next-Generation Micro-Architecture, or NGMA is a multi-core processor The Core 2 brand refers to a range of Intel 's consumer 64-bit dual-core and 2x2 MCM quad-core CPUs with the X86-64 instruction set The Pentium Dual-Core brand refers to mainstream X86 -architecture Microprocessors from Intel. The Celeron brand is a range of X86 CPUs from Intel targeted at budget/value Personal computers €”with the motto "delivering great quality The Xeon brand refers to many families of Intel 's x86 Multiprocessing CPUs – for dual-processor (DP and multi-processor (MP configuration

The Pentium III was the first Intel processor to break 1 GFLOPS, with a theoretical performance of 2 GFLOPS. Measuring performance In order for FLOPS to be useful as a measure of floating-point performance a standard benchmark must be available on all computers of interest

Contents 1 Pentium III variants 1.1 Katmai 1.2 Coppermine 1.3 Coppermine-T 1.4 Tualatin 2 Pentium III's SSE implementation 3 Core specifications 3.1 Katmai (0.25 µm) 3.2 Coppermine (0.18 µm) 3.3 Coppermine-T (0.18 µm) 3.4 Tualatin (0.13 µm) 4 Controversy about privacy issues 5 References 6 See also 7 External links

Pentium III variants

Katmai

The first Pentium III variant was the Katmai (Intel product code 80525). It was very similar to the Deschutes Pentium II and used a 0. The Pentium II brand refers to Intel 's sixth-generation Microarchitecture (" Intel P6 " and x86 -compatible Microprocessors 25 µm CMOS semiconductor process). The only differences were the introduction of SSE and an improved L1 cache controller, which was responsible for the minor performance improvements over the "Deschutes" Pentium IIs. It was first released at speeds of 450 and 500 MHz. Two more versions were released: 550 MHz on May 17, 1999 and 600 MHz on August 2, 1999. Events 1521 - Edward Stafford 3rd Duke of Buckingham, is executed for Treason. Year 1999 ( MCMXCIX) was a Common year starting on Friday (link will display full 1999 Gregorian calendar) Events 338 BC - A Macedonian army led by Philip II defeated the combined forces of Athens and Thebes in the Year 1999 ( MCMXCIX) was a Common year starting on Friday (link will display full 1999 Gregorian calendar) On September 27, 1999 Intel released the 533B and 600B running at 533 & 600 MHz respectively. Events 489 - Odoacer attacks Theodoric at the Battle of Verona and is defeated again Year 1999 ( MCMXCIX) was a Common year starting on Friday (link will display full 1999 Gregorian calendar) The 'B' suffix indicated that it featured a 133 MHz FSB, instead of the 100 MHz FSB of previous models.

The Katmai used the same slot based design as the Pentium II but with the newer SECC2 cartridge that allowed direct CPU core contact with the heat sink. Slot 1 refers to the physical and electrical specification for the connector used by some of Intel 's microprocessors including the Celeron, Pentium II There have been some early models of the Pentium III with 450 and 500 MHZ packaged in an older SECC cartridge intended for OEMs. An original equipment manufacturer, or OEM is typically a company that uses a component made by a second company in its own product or sells the product of the second company

A notable stepping for enthusiasts was SL35D. Stepping is a designation used by Intel and AMD to identify how much the design of a Microprocessor has advanced from the original design This version of Katmai was officially rated for 450 MHz, but often contained cache chips for the 600 MHz model and thus usually was capable of running at 600 MHz.

Coppermine

The second version, Coppermine, or 80526, had an integrated full-speed 256-bit 256 KiB L2 cache with lower latency, named Advanced Transfer Cache by Intel, which improved performance significantly over Katmai. In computing binary prefixes are names or associated symbols that can precede a unit of measure (such as a Byte) to indicate multiplication by a power of two The Advanced Transfer Cache (ATC is Intel's name for the L2 cache contained within their processors starting with the Pentium III "Coppermine" Under competitive pressure from AMD’s Athlon processor, Intel also re-worked the chip internally, and finally fixed the well known instruction pipeline stalls. Athlon is the brand name applied to a series of different X86 processors designed and manufactured by AMD. In Computer architecture, a hazard is a potential problem that can happen in a pipelined processor. The result was a remarkable 30% increased performance in some applications where these stalls happened.

It was built on a 0. 18 μm process. A micrometre ( American spelling: micrometer; symbol µm) is one millionth of a Metre, or equivalently one thousandth of a Millimetre Pentium III Coppermines running at 500, 533, 550, 600, 650, 667, 700, and 733 MHz were first released on October 25, 1999. Events 1147 - The Portuguese, under Afonso I, and Crusaders from England and Flanders conquer Lisbon after a Year 1999 ( MCMXCIX) was a Common year starting on Friday (link will display full 1999 Gregorian calendar) From December 1999 to May 2000, Intel released Pentium IIIs running at speeds of 750, 800, 850, 866, 900, 933 and 1000 MHz (1 GHz). Both 100 MHz FSB and 133 MHz FSB models were made. An "E" was appended to the model name to indicate cores using the new 0. 18 μm fabrication process. An additional "B" was later appended to designate 133 MHz FSB models, resulting in an "EB" suffix.

A 1. 13 GHz version was released in mid-2000 but famously recalled after a collaboration between HardOCP and Tom's Hardware discovered various instabilities with the operation of the new CPU speed grade. The Coppermine core was unable to reliably reach the 1. 13 GHz speed without various tweaks to the processor's microcode, aggressive cooling, additional voltage (1. 75 V vs. 1. 65 V), and specifically validated platforms. ^[2] Intel only officially supported the processor on its own VC820 i820-based motherboard, but even this motherboard displayed instability in the independent tests of the hardware review sites. This is a list of Computer Motherboard Chipsets made by Intel. In benchmarks that were stable, performance was shown to be sub-par, with the 1. 13 GHz CPU equalling a 1. 0 GHz model. Tom's Hardware attributed this performance deficit to relaxed tuning of the CPU and motherboard to improve stability. ^[3] Intel needed at least six months to resolve the problems using a new cD0 stepping and re-released 1. 1 GHz and 1. 13 GHz versions in 2001.

Microsoft's Xbox game console uses a variant of the Pentium III/Mobile Celeron family in a Micro-PGA2 form factor. Microsoft Corporation is an American multinational Computer technology Corporation, which rose to dominate the Home computer The Xbox is a sixth-generation Video game console produced by Microsoft Corporation. The Micro-PGA2, also known as the μPGA2, is Intel 's Pin grid array package for their Pentium III and some later Celeron mobile processors The sSpec designator of the chips is SL5Sx, which makes it most similar to the Mobile Celeron Coppermine-128 processor. The Celeron is a family of microprocessors from Intel targeted at the low-end consumer market It shares with the Coppermine-128 Celeron its 133 MT/s front side bus, 128 KiB L2 cache, and 180 nm fabrication process. ^[4]

Although the codename Coppermine makes it sound as if the chip was fabricated with copper interconnects, Coppermine in fact used aluminum interconnects. Copper-based chips are Semiconductor Integrated circuits usually Microprocessors which use Copper for Interconnections Since copper

In late model Coppermine CPUs, Intel implemented a integrated heat spreader to improve contact between the die and the heatsink. A heat spreader is most often simply a copper plate having high Thermal conductivity. A heat sink (or heatsink) is an environment or object that absorbs and dissipates heat from another object using Thermal contact (either direct or radiant The integrated heat spreader itself didn't improve thermal conductivity, since it added another layer of metal and thermal paste between the die and the heatsink, but it greatly assisted in holding the heatsink flat against the die. Thermal grease (also called thermal compound, heat paste, heat transfer compound, thermal paste, or Earlier Coppermine CPUs without the integrated heat spreader made heatsink mounting challenging. ^[5] If the heatsink was not flat against the die, heat transfer efficiency was crippled. Some heatsink makers also began using pads on their coolers, similar to what AMD did with the "Thunderbird" Athlon. The enthusiast community went so far as to create shims to assist in maintaining a flat interface. ^[6]

Coppermine-T

This revision is an intermediate step between Coppermine and Tualatin, with support for lower-voltage system logic present on the latter but core power within previously defined voltage specs of the former so it could work in older system boards.

Intel used the latest Coppermines with the cD0-Stepping and modified them so that they worked with low voltage system bus operation (GTL) at 1. Gunning Transceiver Logic or GTL is a type of logic signalling used to drive electronic Backplane buses It has a Voltage swing between 25 V AGTL as well as normal 1. 5 V AGTL+ signal levels, and would auto detect differential or single-ended clocking. This modification made them compatible to the latest generation Socket-370 boards supporting FC-PGA2 packaged CPUs while maintaining combatility to the older FC-PGA boards. The Coppermine-T was also two way symmetrical multiprocessing capable but only in FC-PGA2 boards.

The Coppermine-T is the only Coppermine to feature an integrated heat spreader.

Tualatin

The third revision, Tualatin (80530), was a trial for Intel's new 0. 13 µm process. Pentium III Tualatins were released during 2001 until early 2002 at speeds of 1. 0, 1. 13, 1. 2, 1. 26, 1. 33 and 1. 4 GHz. Tualatin performed quite well, especially in variations which had 512 KiB L2 cache (called the Pentium III-S). The Pentium III-S variant was mainly intended for servers, especially those where power consumption mattered, i. e. , thin blade servers. Blade servers are self-contained/ all inclusive computer servers, designed for high density

The Tualatin also formed the basis for the highly popular Pentium III-M mobile processor, which became Intel's front-line mobile chip (the Pentium 4 drew a lot more power, and so was not well-suited for this role) for the next two years. The chip offered a good balance between power consumption and performance, thus finding a place in both performance notebooks and the "thin and light" category.

Tualatin-based Pentium III CPUs can usually be visually distinguished from Coppermine-based processors by the metal integrated heat-spreader (IHS) fixed on top of the package. However, the very last models of Coppermine Pentium IIIs also featured the IHS — the heatspreader is actually what distinguishes the FC-PGA2 package from the FC-PGA — both are for Socket 370 motherboards. Flip-chip pin grid array ( FC-PGA or FCPGA) is a form of Pin grid array processor architecture package in which the die Socket 370 (also known as the PGA370 socket) is a common format of CPU socket first used by Intel for Pentium III and Celeron ^[7]

Before the addition of the heatspreader, it was sometimes difficult to install a heatsink on a Pentium III. One had to be careful to not put force on the core at an angle because doing so would cause the edges and corners of the core to crack and could destroy the CPU. It was also sometimes difficult to achieve a flat mating of the CPU and heatsink surfaces, a factor of critical importance to good heat transfer. This became increasingly challenging with the socket 370 CPUs, compared with their Slot 1 predecessors, because of the force required to mount a socket-based cooler and the narrower, 2-sided mounting mechanism (Slot 1 featured 4-point mounting). As such, and because the 0. 13 µm Tualatin had an even smaller core surface area than the 0. 18 µm Coppermine, Intel installed the metal heatspreader on Tualatin and all future desktop processors.

The Tualatin core was named after the Tualatin Valley and Tualatin River in Oregon, where Intel has large manufacturing and design facilities. The Tualatin Valley is a farming and suburban region southwest of Portland, Oregon in the United States. The Tualatin River is a tributary of the Willamette River located in Oregon in the United States. Oregon ( is a state in the Pacific Northwest region of the United States.

Pentium III's SSE implementation

Since Katmai was built in the same 0. 25 µm process as Pentium II "Deschutes", it had to implement SSE using as little silicon as possible. To achieve this goal, Intel implemented the 128-bit architecture by double-cycling the existing 64-bit data paths and by merging the SIMD-FP multiplier unit with the x87 scalar FPU multiplier into a single unit. To utilize the existing 64-bit data paths, Katmai issues each SIMD-FP instruction as two μops. To compensate partially for implementing only half of SSE’s architectural width, Katmai implements the SIMD-FP adder as a separate unit on the second dispatch port. This organization allows one half of a SIMD multiply and one half of an independent SIMD add to be issued together bringing the peak throughput back to four floating point operations per cycle — at least for code with an even distribution of multiplies and adds. ^[8]

The issue was that Katmai’s hardware-implementation contradicted the parallelism model implied by the SSE instruction-set. Programmers faced a code-scheduling dilemma: Should the SSE-code be tuned for Katmai's limited execution resources, or should it be tuned for a future processor with more resources? Katmai-specific SSE optimizations yielded the best possible performance from the Pentium III family, but was suboptimal for later Intel processors, such as the Pentium 4 and Core.

Core specifications

Katmai (0. 25 µm)

• L1-Cache: 16 + 16 KiB (Data + Instructions)
• L2-Cache: 512 KiB, external chips on CPU module at 50% of CPU-speed
• MMX, SSE
• Slot 1 (SECC, SECC2)
• Front side bus: 100, 133 MHz
• VCore: 2. MMX is a single instruction multiple data (SIMD Instruction set designed by Intel, introduced in 1997 in their Pentium line of S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 Slot 1 refers to the physical and electrical specification for the connector used by some of Intel 's microprocessors including the Celeron, Pentium II In Personal computers the Front Side Bus ( FSB) is the bus that carries data between the CPU and the northbridge. The CPU core voltage ( VCORE) is the Power supply Voltage supplied to the CPU (which is a Digital circuit) GPU 0 V, (600 MHz: 2. 05 V)
• First release: May 17, 1999
• Clockrate: 450-600 MHz
  • 100 MHz FSB: 450, 500, 550, 600 MHz
  • 133 MHz FSB: 533, 600 MHz (B-models)

Coppermine (0. Events 1521 - Edward Stafford 3rd Duke of Buckingham, is executed for Treason. Year 1999 ( MCMXCIX) was a Common year starting on Friday (link will display full 1999 Gregorian calendar) 18 µm)

• L1-Cache: 16 + 16 KiB (Data + Instructions)
• L2-Cache: 256 KiB, fullspeed
• MMX, SSE
• Slot 1 (SECC2), Socket 370 (FC-PGA)
• Front side bus: 100, 133 MHz
• VCore: 1. MMX is a single instruction multiple data (SIMD Instruction set designed by Intel, introduced in 1997 in their Pentium line of S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 Slot 1 refers to the physical and electrical specification for the connector used by some of Intel 's microprocessors including the Celeron, Pentium II Socket 370 (also known as the PGA370 socket) is a common format of CPU socket first used by Intel for Pentium III and Celeron In Personal computers the Front Side Bus ( FSB) is the bus that carries data between the CPU and the northbridge. 6V, 1. 65V, 1. 70V, 1. 76V (cD0, see below)
• First release: October 25, 1999
• Clockrate: 500 - 1133 MHz
  • 100 MHz FSB: 500, 550, 600, 650, 700, 750, 800, 850, 900, 1000, 1100 MHz (E-Models)
  • 133 MHz FSB: 533, 600, 667, 733, 800, 866, 933, 1000, 1133 MHz (EB-Models)

Coppermine-T (0. Events 1147 - The Portuguese, under Afonso I, and Crusaders from England and Flanders conquer Lisbon after a Year 1999 ( MCMXCIX) was a Common year starting on Friday (link will display full 1999 Gregorian calendar) 18 µm)

• L1-Cache: 16 + 16 KiB (Data + Instructions)
• L2-Cache: 256 KiB, fullspeed
• MMX, SSE
• Socket 370 (FC-PGA, FC-PGA2)
• Front side bus: 100 and 133 MHz
• VCore: 1. MMX is a single instruction multiple data (SIMD Instruction set designed by Intel, introduced in 1997 in their Pentium line of S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 Socket 370 (also known as the PGA370 socket) is a common format of CPU socket first used by Intel for Pentium III and Celeron In Personal computers the Front Side Bus ( FSB) is the bus that carries data between the CPU and the northbridge. 75 V
• First release: June 2001
• Clockrate: 600 - 1133 MHz
  • 133 MHz FSB: 800, 933, 1000, 1133 MHz

Tualatin (0. 13 µm)

• L1-Cache: 16 + 16 KiB (Data + Instructions)
• L2-Cache: 256 or 512 KiB, fullspeed
• MMX, SSE, Hardware prefetch
• Socket 370 (FC-PGA2)
• Front side bus: 133 MHz
• VCore: 1. MMX is a single instruction multiple data (SIMD Instruction set designed by Intel, introduced in 1997 in their Pentium line of S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 Socket 370 (also known as the PGA370 socket) is a common format of CPU socket first used by Intel for Pentium III and Celeron In Personal computers the Front Side Bus ( FSB) is the bus that carries data between the CPU and the northbridge. 45, 1. 475 V
• First release: 2001
• Clockrate: 1000 - 1400 MHz
  • Pentium III (256 KiB L2-Cache): 1000, 1133, 1200, 1333, 1400 MHz
  • Pentium III-S (512 KiB L2-Cache): 1133, 1266, 1400 MHz

Controversy about privacy issues

The Pentium III was the first CPU to include a unique, retrievable, identification number, called PSN (Processor Serial Number). A Pentium III's PSN can be read by software through the CPUID instruction if this feature has not been disabled in BIOS. The CPUID Opcode is an instruction (its name derived from CPU IDentification for the X86 architecture In Computing, the BIOS (ˈbaɪoʊs

On November 29, 1999, the Science and Technology Options Assessment Panel (STOA) of the European Parliament, following their report on electronic surveillance techniques asked parliamentary committee members to consider legal measures that would "prevent these chips from being installed in the computers of European citizens. Events 1777 - San Jose California, is founded as el Pueblo de San José de Guadalupe Year 1999 ( MCMXCIX) was a Common year starting on Friday (link will display full 1999 Gregorian calendar) The European Parliament ( Europarl or EP) is the only directly elected parliamentary institution of the European Union (EU "^[9]

Eventually Intel decided to remove the PSN feature on Tualatin-based Pentium IIIs, and the feature was not carried through to the Pentium 4 or Pentium M.

References

See also

• Intel Pentium 4 microprocessor
• List of Intel Pentium III microprocessors
• List of Intel Celeron microprocessors

External links

• Listing of various PII, PIII, and Celeron alphanumeric model designations
• Intel Pentium III technical specifications Nice overview, but use with caution: Some information on this site is in conflict with Intel's documentation. The Pentium 4 brand refers to Intel 's line of single- core mainstream desktop and Laptop Central processing units (CPUs introduced The Pentium III from Intel is a sixth-generation CPU targeted at the consumer market The Celeron is a family of microprocessors from Intel targeted at the low-end consumer market
• Comparison of 7th generation x86 CPU architectures
• Intel FAQ about the pentium III processor serial number

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