The Opteron is AMD's x86 server processor line, and was the first processor to implement the AMD64 instruction set architecture (known generically as x86-64). See also X86 assembly language The generic term x86 refers to the most commercially successful Instruction set architecture in the history of Personal x86-64 is a Superset of the x86 instruction set architecture. An instruction set is a list of all the instructions and all their variations that a processor can execute x86-64 is a Superset of the x86 instruction set architecture. It was released on April 22, 2003 with the SledgeHammer core (K8) and was intended to compete in the server market, particularly in the same segment as the Intel Xeon processor. Events 1500 - Portuguese Navigator Pedro Álvares Cabral becomes the first European to sight Brazil. Year 2003 ( MMIII) was a Common year starting on Wednesday of the Gregorian calendar. A server is a Computer dedicated to providing one or more services over a computer network typically through a request-response routine The Xeon brand refers to many families of Intel 's x86 Multiprocessing CPUs – for dual-processor (DP and multi-processor (MP configuration Processors based on the AMD K10 microarchitecture (codenamed Barcelona) were announced on September 10, 2007 featuring a new quad-core configuration. The AMD K10 is AMD 's latest Microprocessor architecture. Though there were once reports that the K10 had been cancelled, the first third-generation Events 506 - The Bishops of Visigothic Gaul meet in the Council of Agde. Year 2007 ( MMVII) was a Common year starting on Monday of the Gregorian calendar in the 21st century. A multi-core processor (or chip-level multiprocessor, CMP) combines two or more independent cores into a single package composed of a single Integrated

Contents 1 Technical description 1.1 The two key capabilities 1.2 Multi-processor features 1.3 Multi-core Opterons 1.4 Socket 939 1.5 Socket AM2 1.6 Socket F 1.6.1 Micro-architecture update 2 Models 2.1 Opteron (130 nm SOI) 2.2 Opteron (90 nm SOI, DDR) 2.3 Opteron (90 nm SOI, DDR2) 2.4 Opteron (65 nm SOI) 3 Supercomputers 4 Issues 4.1 Opteron without Optimized Power Management 4.2 Opteron recall 5 Future 6 See also 7 References 8 External links

Technical description

The two key capabilities

Opteron combines two important capabilities in a single processor die:

1. native execution of legacy x86 32-bit applications without speed penalties
2. native execution of x86-64 64-bit applications

The first capability is notable because at the time of Opteron's introduction, the only other 64-bit processor architecture marketed with 32-bit x86 compatibility (Intel's Itanium) ran x86 legacy-applications only with significant speed degradation. The range of Integer values that can be stored in 32 bits is 0 through 4294967295 or −2147483648 through 2147483647 using Two's complement encoding '64-bit' CPUs have existed in Supercomputers since the 1960s and in RISC -based workstations and servers since the early 1990s. '64-bit' CPUs have existed in Supercomputers since the 1960s and in RISC -based workstations and servers since the early 1990s. The range of Integer values that can be stored in 32 bits is 0 through 4294967295 or −2147483648 through 2147483647 using Two's complement encoding See also X86 assembly language The generic term x86 refers to the most commercially successful Instruction set architecture in the history of Personal Itanium is the brand name for 64-bit Intel Microprocessors that implement the Intel Itanium architecture (formerly called IA-64) See also X86 assembly language The generic term x86 refers to the most commercially successful Instruction set architecture in the history of Personal The second capability, by itself, is less noteworthy, as all major RISC makers (Sun SPARC, DEC Alpha, HP PA-RISC, IBM POWER, SGI MIPS, etc. Sun Microsystems Inc ( is a multinational vendor of Computers computer components Computer software, and Information technology services SPARC (from Scalable Processor Architecture is a RISC Microprocessor Instruction set architecture originally Digital Equipment Corporation was a pioneering American company in the Computer industry Alpha, originally known as Alpha AXP, was a 64-bit Reduced instruction set computer (RISC Instruction set architecture (ISA developed PA-RISC is a Microprocessor architecture developed by Hewlett-Packard 's Systems & VLSI Technology Operation. International Business Machines Corporation abbreviated IBM and nicknamed "Big Blue", is a multinational Computer Technology POWER is a RISC Instruction set architecture designed by IBM. Silicon Graphics Inc (commonly initialised to SGI, historically sometimes referred to as Silicon Graphics Computer Systems or SGCS) is a company MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies ) have had 64-bit implementations for many years. In combining these two capabilities, however, the Opteron has earned recognition for its ability to run the vast installed base of x86 applications economically, while simultaneously offering an upgrade-path to 64-bit computing.

The Opteron processor possesses an integrated DDR SDRAM / DDR2 SDRAM (Socket AM2/F) memory controller. DDR SDRAM ( double data rate synchronous dynamic random access memory) is a class of memory Integrated circuit used in Computers It achieves nearly twice The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors is a CPU socket designed by AMD for desktop Socket F is a CPU socket designed by AMD for its Opteron line of CPUs, and released on August 15 2006. The memory controller is a chip on a computer's Motherboard or CPU die which manages the flow of data going to and from the memory. This both reduces the latency penalty for accessing the main RAM and eliminates the need for a separate northbridge chip. SDRAM latency refers to the delays incurred when a Computer tries to access Data in SDRAM. The northbridge, also known as the memory controller hub ( MCH) in Intel systems (AMD VIA SiS and others usually use 'northbridge' is traditionally one

Multi-processor features

In multi-processor systems (more than one Opteron on a single motherboard), the CPUs communicate using the Direct Connect Architecture over high-speed HyperTransport links. A motherboard is the central or primary Printed circuit board (PCB making up a complex electronic system such as a modern Computer or Laptop The Direct Connect Architecture is the I/O architecture of the Athlon 64 X2, Opteron, and Phenom Microprocessors from AMD. Each CPU can access the main memory of another processor, transparent to the programmer. The Opteron approach to multi-processing is not the same as standard symmetric multiprocessing as instead of having one bank of memory for all CPUs, each CPU has its own memory. In Computing, symmetric multiprocessing or SMP involves a Multiprocessor computer-architecture where two or more identical processors can connect to a single Thus the Opteron is a Non-Uniform Memory Access (NUMA) architecture. Non-Uniform Memory Access or Non-Uniform Memory Architecture ( NUMA) is a computer memory design used in Multiprocessors where the memory access The Opteron CPU directly supports up to an 8-way configuration, which can be found in mid-level servers. Enterprise-level servers use additional (and expensive) routing chips to support more than 8 CPUs per box.

In a variety of computing benchmarks, the Opteron architecture has demonstrated better multi-processor scaling than the Intel Xeon. The Xeon brand refers to many families of Intel 's x86 Multiprocessing CPUs – for dual-processor (DP and multi-processor (MP configuration This is primarily because adding an additional Opteron processor increases bandwidth, while that is not always the case for Xeon systems, and the fact that the Opterons use a switched fabric, rather than a shared bus. Switched fabric, switching fabric, or just fabric, is a Network topology where network nodes connect with each other via one or more Network switches In Computer architecture, a bus is a subsystem that transfers data between computer components inside a Computer or between computers In particular, the Opteron's integrated memory controller allows the CPU to access local RAM very quickly. In contrast, multiprocessor Xeon system CPUs share only two common buses for both processor-processor and processor-memory communication. As the number of CPUs increases in a Xeon system, contention for the shared bus causes computing efficiency to drop. Bus contention, in Computer design, is an undesirable state of the bus in which more than one device on the bus attempts to place values on the bus at the same time

Multi-core Opterons

In May of 2005, AMD introduced its first "Multi-Core" Opteron CPUs. At the present time, the term "Multi-Core" at AMD in practice means "dual-core"; each physical Opteron chip actually contains two separate processor cores. A multi-core processor (or chip-level multiprocessor, CMP) combines two or more independent cores into a single package composed of a single Integrated This effectively doubles the computing-power available to each motherboard processor socket. One socket can now deliver the performance of two processors, two sockets can deliver the performance of four processors, and so on. Since motherboard costs go up dramatically as the number of CPU sockets increases, multicore CPUs now allow much higher performing systems to be built with more affordable motherboards.

AMD's model number scheme has changed somewhat in light of its new multicore lineup. At the time of its introduction, AMD's fastest multicore Opteron was the model 875, with two cores running at 2. 2 GHz each. The hertz (symbol Hz) is a measure of Frequency, informally defined as the number of events occurring per Second. AMD's fastest single-core Opteron at this time was the model 252, with one core running at 2. 6 GHz. For multithreaded applications, the model 875 would be much faster than the model 252, but for single threaded applications the model 252 would perform faster. A thread in Computer science is short for a thread of execution.

Next-Generation AMD Opteron processors are offered in three series: the 1200 Series (up to 1P/2-core), the 2200 Series (up to 2P/4-core), and the 8200 Series (4P/8-core to 8P/16-core). The 1200 Series is built on AMD's new Socket AM2. The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors is a CPU socket designed by AMD for desktop The 2200 Series and 8200 Series are built on AMD's new Socket F. Socket F is a CPU socket designed by AMD for its Opteron line of CPUs, and released on August 15 2006.

AMD launched quad core^[1] Opteron chips on September 10th, 2007 ^[2] with hardware vendors to follow suit with servers in the following month. Based on a core design codenamed Barcelona, new power and thermal management techniques are planned for the chips. Existing dual core DDR2 based platforms will be upgradeable to quad core chips^[3].

Socket 939

AMD has also released Socket 939 Opterons, reducing the cost of motherboards for low-end servers and workstations. Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors Except for the fact they have 1 MiB L2 Cache (versus 512 KiB for the Athlon64) the Socket 939 Opterons are identical to the San Diego and Toledo core Athlon 64s, but are run at lower clockspeeds than the cores are capable of, making them more stable. A mebibyte (a contraction of me ga bi nary byte) is a unit of Information or Computer storage, abbreviated MiB. A kibibyte (a contraction of ki lo bi nary byte) is a unit of Information or Computer storage, established by the International The Athlon 64 is an eighth-generation AMD64 architecture Microprocessor produced by AMD, released on They are also the only dual core Socket 939 processors still easily available now that the Athlon 64 X2s for that platform have been discontinued, though even these processors are becoming more and more difficult to find. [1]

Socket AM2

Socket AM2 Opterons are available for servers that only have a single-chip setup. These chips may prove to be as successful as the previous generation socket 939 Opterons due to the Opteron's overclockability. Codenamed Santa Ana, rev. F dual core AM2 Opterons feature 2×1 MiB L2 cache, unlike the majority of their Athlon 64 X2 cousins which feature 2x512 KiB L2 cache. A mebibyte (a contraction of me ga bi nary byte) is a unit of Information or Computer storage, abbreviated MiB. The Athlon 64 X2 is the first dual-core desktop CPU manufactured by AMD. A kibibyte (a contraction of ki lo bi nary byte) is a unit of Information or Computer storage, established by the International

Socket F

Socket F (LGA 1207 contacts) is AMD’s second generation of Opteron socket. Socket F is a CPU socket designed by AMD for its Opteron line of CPUs, and released on August 15 2006. The land grid array ( LGA) is a type of Surface-mount packaging used for Integrated circuits It can be electrically connected This socket support processors such as the Santa Rosa, Barcelona and Shanghai codenamed processors. The “Lidded Land Grid Array” socket adds support for DDR2 SDRAM and improved HyperTransport version 3 connectivity. The land grid array ( LGA) is a type of Surface-mount packaging used for Integrated circuits It can be electrically connected Physically the socket and processor package are nearly identical, although not generally compatible with socket 1207 FX

Micro-architecture update

The Opteron line saw an update with the implementation of the AMD K10 microarchitecture. Socket F is a CPU socket designed by AMD for its Opteron line of CPUs, and released on August 15 2006. The AMD K10 is AMD 's latest Microprocessor architecture. Though there were once reports that the K10 had been cancelled, the first third-generation New processors, launched in the third quarter of 2007 (codename Barcelona), incorporate a variety of improvements, particularly in memory prefetching, speculative loads, SIMD execution and branch prediction, yielding an appreciable performance improvement over K8-based Opterons, within the same power envelope. In Computing, SIMD ( S ingle I nstruction M ultiple D ata is a technique employed to achieve data level parallelism as in a Vector ^[4]

In the meantime, AMD has also utilized a new scheme to characterize the power consumption of new processors under "average" daily usage, named Average CPU Power (ACP). The Average CPU Power (abbreviated ACP) is a scheme to characterize power consumption of new processors under "average" daily usage (especially server processors

Models

First generation single-core Opterons follow the three-digit "Opteron xyy" model numbers and going forward the newer generations (all dual cores) are four-digit in the form "Opteron xnyy". ^[5]

The first digit (the x) specifies the maximum number of CPUs on the target machine:

• 1 - Designed for uniprocessor systems
• 2 - Designed for dual-processor systems
• 8 - Designed for systems with 4 or 8 processors

The n digit is the release number (omitted in first release). The major differences between release one and release two include different socket type (socket 940 vs. socket F), single-core vs. dual core, quad-core upgradeability, support for DDR1 vs. DDR SDRAM ( double data rate synchronous dynamic random access memory) is a class of memory Integrated circuit used in Computers It achieves nearly twice DDR2 memory and for AMD Virtualization. x86 virtualization is the method by which X86 -based "guest" operating systems are run under another "host" x86 operating system with little or no modification

The last two digits in the model number (the yy) give an indication of the relative performance comparison among models of the processors.

Models with an HE label refers to a low-power deviative with 55W & 68W lower TDP value, while products with a SE label refers to a high performance processor with higher TDP values. The Thermal Design Power (TDP (sometimes called Thermal Design Point) represents the maximum amount of power the cooling system in a computer is required to dissipate A detailed list of Opteron microprocessors is here. Opteron is the name of a family of CPUs within the AMD64 line designed by AMD for the server market The broad model families are:

Opteron (130 nm SOI)

Single-core — SledgeHammer (1yy, 2yy, 8yy)

• CPU-Steppings: B3, C0, CG
• L1-Cache: 64 + 64 KiB (Data + Instructions)
• L2-Cache: 1024 KiB, fullspeed
• MMX, Extended 3DNow!, SSE, SSE2, AMD64
• Socket 940, 800 MHz HyperTransport
• Registered DDR SDRAM required, ECC possible
• VCore: 1. MMX is a single instruction multiple data (SIMD Instruction set designed by Intel, introduced in 1997 in their Pentium line of 3DNow! is the Trade name of a multimedia extension created by AMD for its processors starting with the K6-2 in 1998 S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 SSE2, Streaming SIMD Extensions 2, is one of the IA-32 SIMD (Single Instruction Multiple Data Instruction sets SSE2 was first introduced by x86-64 is a Superset of the x86 instruction set architecture. Chipsets Socket 940 motherboards are currently available with the following chipsets AMD's own 8000-series VIA K8T890 nVidia nForce3 Pro DDR SDRAM ( double data rate synchronous dynamic random access memory) is a class of memory Integrated circuit used in Computers It achieves nearly twice In Telecommunication and Information theory, forward error correction (FEC is a System of Error control for Data transmission, whereby 50 V - 1. 55 V
• Max Power (TDP): 89 W
• First Release: April 22, 2003 [2]
• Clockrate: 1400–2400 MHz (x40 - x50)

Opteron (90 nm SOI, DDR)

Single-core — Venus (1yy), Troy (2yy), Athens (8yy)

• CPU-Steppings: E4
• L1-Cache: 64 + 64 KiB (Data + Instructions)
• L2-Cache: 1024 KiB, fullspeed
• MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64
• Socket 940, 800 MHz HyperTransport
• Socket 939/Socket 940, 1000 MHz HyperTransport
• Registered DDR SDRAM required for socket 940, ECC possible
• VCore: 1. MMX is a single instruction multiple data (SIMD Instruction set designed by Intel, introduced in 1997 in their Pentium line of 3DNow! is the Trade name of a multimedia extension created by AMD for its processors starting with the K6-2 in 1998 S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 SSE2, Streaming SIMD Extensions 2, is one of the IA-32 SIMD (Single Instruction Multiple Data Instruction sets SSE2 was first introduced by SSE3, also known by its Intel code name Prescott New Instructions (PNI, is the third iteration of the SSE instruction set for the IA-32 architecture x86-64 is a Superset of the x86 instruction set architecture. Chipsets Socket 940 motherboards are currently available with the following chipsets AMD's own 8000-series VIA K8T890 nVidia nForce3 Pro Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors Chipsets Socket 940 motherboards are currently available with the following chipsets AMD's own 8000-series VIA K8T890 nVidia nForce3 Pro DDR SDRAM ( double data rate synchronous dynamic random access memory) is a class of memory Integrated circuit used in Computers It achieves nearly twice In Telecommunication and Information theory, forward error correction (FEC is a System of Error control for Data transmission, whereby 35V - 1. 4V
• Max power (TDP): 95W
• NX Bit
• 64-bit segment limit checks for VMware-style binary-translation virtualization. The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (or code
• Optimized Power Management (OPM)
• First Release: February 14, 2005
• Clockrate: 1600 - 3000 MHz (x42 - x56)

Dual-core — Denmark (1yy), Italy (2yy), Egypt (8yy)

• CPU-Steppings: E1, E6
• First Release: Spring 2005
• Clockrate: 1600–2800 MHz (x60, x65, x70, x75, x80, x85, x90)
• . . .
• Socket 939/Socket 940, 1000 MHz HyperTransport
• . Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors Chipsets Socket 940 motherboards are currently available with the following chipsets AMD's own 8000-series VIA K8T890 nVidia nForce3 Pro . .
• NX bit

Opteron (90 nm SOI, DDR2)

Dual-core — Santa Ana (12yy), Santa Rosa (22yy, 82yy)

• CPU-Steppings: F2, F3
• L1-Cache: 64 + 64 KiB (Data + Instructions)
• L2-Cache: 2*1024 KiB, fullspeed
• MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64
• Socket F, ??? MHz HyperTransport - Opteron 2yy, 8yy
• Socket AM2, ??? MHz HyperTransport - Opteron 1yy
• VCore: 1. The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (or code MMX is a single instruction multiple data (SIMD Instruction set designed by Intel, introduced in 1997 in their Pentium line of 3DNow! is the Trade name of a multimedia extension created by AMD for its processors starting with the K6-2 in 1998 S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 SSE2, Streaming SIMD Extensions 2, is one of the IA-32 SIMD (Single Instruction Multiple Data Instruction sets SSE2 was first introduced by SSE3, also known by its Intel code name Prescott New Instructions (PNI, is the third iteration of the SSE instruction set for the IA-32 architecture x86-64 is a Superset of the x86 instruction set architecture. Socket F is a CPU socket designed by AMD for its Opteron line of CPUs, and released on August 15 2006. The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors is a CPU socket designed by AMD for desktop 35 V
• Max Power (TDP): 95W
• NX Bit
• AMD-V Virtualization
• Optimized Power Management (OPM)
• First Release: ?????? 2006
• Clockrate: 1800–3200 MHz (xx10, xx12, xx14, xx16, xx18, xx20, xx20, xx22, xx24)

Opteron (65 nm SOI)

Quad-core — Barcelona (23yy, 83yy), Budapest (13yy)

• CPU-Steppings: BA, B3
• L1-Cache: 64 + 64 KiB (Data + Instructions) per core
• L2-Cache: 512 KiB, fullspeed per core
• L3-Cache: 2048 KiB, shared
• MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, SSE4a
• Socket F, Socket AM2+, HyperTransport 3.0 (1. The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (or code MMX is a single instruction multiple data (SIMD Instruction set designed by Intel, introduced in 1997 in their Pentium line of 3DNow! is the Trade name of a multimedia extension created by AMD for its processors starting with the K6-2 in 1998 S treaming '''S'''IMD E xtensions ( SSE) is a SIMD (Single Instruction Multiple Data Instruction set extension to the X86 SSE2, Streaming SIMD Extensions 2, is one of the IA-32 SIMD (Single Instruction Multiple Data Instruction sets SSE2 was first introduced by SSE3, also known by its Intel code name Prescott New Instructions (PNI, is the third iteration of the SSE instruction set for the IA-32 architecture x86-64 is a Superset of the x86 instruction set architecture. SSE4 is an Instruction set used in the Intel Core microarchitecture and AMD K10 (K8L. Socket F is a CPU socket designed by AMD for its Opteron line of CPUs, and released on August 15 2006. Socket AM2+ is a CPU socket, which is the immediate successor to Socket AM2 that is currently used by several AMD Processors such as Athlon 6 GHz-2. 0 GHz)
• Registered DDR2 SDRAM required, ECC possible
• VCore: ?
• Max Power (TDP): ?
• NX Bit
• AMD-V Virtualization
• Split power plane dynamic power management
• VCore: 1. In Telecommunication and Information theory, forward error correction (FEC is a System of Error control for Data transmission, whereby The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (or code 2 V
• First Release: September 10, 2007
• Clockrate: 1700–2000 MHz

Supercomputers

On the November 2007 TOP500 list, 15. The volt (symbol V) is the SI derived unit of electric Potential difference or Electromotive force. The hertz (symbol Hz) is a measure of Frequency, informally defined as the number of events occurring per Second. The TOP500 project ranks and details the 500 most powerful known Computer systems in the world 8% of the world's 500 fastest known supercomputer installations were AMD64 Opteron-based systems (down from 22. A supercomputer is a Computer that is at the frontline of processing capacity particularly speed of calculation (at the time of its introduction x86-64 is a Superset of the x86 instruction set architecture. 6% on 11/06), while 64. 4% were Intel ia32e/EM64T/Intel 64 Xeon-based. x86-64 is a Superset of the x86 instruction set architecture. The Xeon brand refers to many families of Intel 's x86 Multiprocessing CPUs – for dual-processor (DP and multi-processor (MP configuration

Supercomputers based on Opteron mentioned in the top 10 fastest supercomputers in the world:

• #6: Sandia National Laboratories, USA. Sandia National Laboratories which is managed and operated by the Sandia Corporation (a wholly owned subsidiary of Lockheed Martin Corporation) is a major United Red Storm - Sandia/ Cray Red Storm, AMD64 Opteron Dual Core 2400 MHz. Cray Inc. 26,569 total cores. Rpeak: 127. 531 TeraFlops. Measuring performance In order for FLOPS to be useful as a measure of floating-point performance a standard benchmark must be available on all computers of interest
• #7: Oak Ridge National Laboratory, USA. Oak Ridge National Laboratory ( ORNL) is a multiprogram science and technology National laboratory managed for the United States Department of Energy by Jaguar - Cray XT4/XT3. AMD64 Opteron Dual Core 2600 MHz (5. 2 GFlops/unit). Cray Inc. 23,016 total cores. Rpeak: 119,350 TFlop.
• #9: NERSC/LBNL, USA. The National Energy Research Scientific Computing Center, or NERSC for short is a designated user facility operated by Lawrence Berkeley National Laboratory and the The Ernest Orlando Lawrence Berkeley National Laboratory ( LBNL) is a U Franklin - Cray XT4. AMD64 Opteron Dual Core 2600 MHz. Cray Inc. 19,320 total cores. Rpeak: 100,464 TFlop.

Issues

Opteron without Optimized Power Management

AMD has released some Opteron processors without Optimized Power Management(OPM) support, which use DDR memory. The following table describes those processors lacking OPM.

Max P-State Frequency	Min P-State Frequency	Model	Package-Socket	Core #	Manufacturing Process	Part Number(OPN)
1400 MHz	N/A	140	Socket 940	1	130 nm	OSA140CEP5AT
1400 MHz	N/A	240	Socket 940	1	130 nm	OSA240CEP5AU
1400 MHz	N/A	840	Socket 940	1	130 nm	OSA840CEP5AV
1600 MHz	N/A	142	Socket 940	1	130 nm	OSA142CEP5AT
1600 MHz	N/A	242	Socket 940	1	130 nm	OSA242CEP5AU
1600 MHz	N/A	842	Socket 940	1	130 nm	OSA842CEP5AV
1600 MHz	N/A	242	Socket 940	1	90 nm	OSA242FAA5BL
1600 MHz	N/A	842	Socket 940	1	90 nm	OSA842FAA5BM
1600 MHz	N/A	260	Socket 940	2	90 nm	OSK260FAA6CB
1600 MHz	N/A	860	Socket 940	2	90 nm	OSK860FAA6CC

Opteron recall

AMD has recalled some E4 stepping-revision single-core Opteron processors, including x52 (2. Chipsets Socket 940 motherboards are currently available with the following chipsets AMD's own 8000-series VIA K8T890 nVidia nForce3 Pro The 90 nanometer (90 nm process refers to the level of CMOS process technology that was reached in the 2002-2003 timeframe by most leading semiconductor companies 6 GHz) and x54 (2. 8 GHz) models which use DDR memory. The following table describes affected processors, as they are listed in AMD Opteron x52 and x54 Production Notice. ^[6]

Max P-State Frequency	Uni-Processor	Dual Processor	Multi-Processor	Package-Socket
2600 MHz	152	252	852	Socket 940
2800 MHz	N/A	254	854	Socket 940
2600 MHz	152	N/A	N/A	Socket 939
2800 MHz	154	N/A	N/A	Socket 939

The affected processors may produce inconsistent results in the presence of three specific conditions occurring simultaneously:

• The execution of floating point-intensive code sequences
• Elevated processor temperatures
• Elevated ambient temperatures

A software verification tool for identifying the AMD Opteron processors listed in the above table that may be affected under these specific conditions is available only to AMD OEM partners. Chipsets Socket 940 motherboards are currently available with the following chipsets AMD's own 8000-series VIA K8T890 nVidia nForce3 Pro Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors An original equipment manufacturer, or OEM is typically a company that uses a component made by a second company in its own product or sells the product of the second company AMD will replace those processors at no charge.

Future

Future Opteron processors will see an implementation of the Montreal core based on a 45 nm fabrication node, manufactured using the MCM technique. A Multi-Chip Module (MCM is a specialized electronic package where multiple Integrated circuits (ICs semiconductor dies or other modules are packaged in such a way as Further, the server line of processors will incorporate the newly announced Bulldozer core with native 4 cores or more configurations, each supporting SSE5 aimed at better HPC and cryptographic computations. Bulldozer is the codename AMD has given to one of the next-generation CPU cores after the K10 microarchitecture for the company's M-SPACE design methodology The SSE5 (short for Streaming SIMD Extensions version 5) announced by AMD on August 30 2007 is an extension to the 128-bit SSE core instructions High-performance computing (HPC uses Supercomputers and Computer clusters to solve advanced computing problems

See also

• List of AMD Opteron microprocessors

References

External links

• Official Opteron homepage
• AMD Technical Docs
• Opteron Architecture Training Course by MindShare
• AMD K8 Opteron technical specifications
• AMD K8 Dual Core Opteron technical specifications
• Interactive AMD Opteron rating and product ID guide
• Understanding the Detailed Architecture of AMD's 64 bit Core
• 28th Top 500 List (Nov 2006)
• Sun Microsystems Opteron Page (Dec 2006)
• AMD: dual-core Opteron to 3GHz

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