Nanoimprint lithography is a novel method of fabricating nanometer scale patterns. It is a simple process with low cost, high throughput and high resolution. It creates patterns by mechanical deformation of imprint resist and subsequent processes. The imprint resist is typically a monomer or polymer formulation that is cured by heat or UV light during the imprinting. A monomer (from Greek mono "one" and meros "part" is a small Molecule that may become chemically bonded to other A polymer is a large Molecule ( Macromolecule) composed of repeating Structural units typically connected by Covalent Chemical bonds Adhesion between the resist and the template is controlled to allow proper release.
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Nanoimprint lithography[1] was first invented by Prof. Stephen Chou and his students. Soon after its invention, a lot of researchers have developed many different variations and implementations. At this point, nanoimprint lithography has been added to the International Technology Roadmap for Semiconductors (ITRS) for the 32 and 22 nm nodes. The International Technology Roadmap for Semiconductors is a set of documents produced by a group of Semiconductor industry experts The 32 nanometer (32 nm process (also called 32 nanometer node) is the next step after the 45 nanometer process in CMOS manufacturing and The 22 nanometer (22 nm node is the CMOS process step following 32 nm.
There are many different types of Nanoimprint Lithography, but two of them are most important: Thermoplastic Nanoimprint lithography and Photo Nanoimprint Lithography.
Thermoplastic Nanoimprint lithography (T-NIL) is the earliest nanoimprint lithography developed by Professor Stephen Y. Chou's group. In a standard T-NIL process, a thin layer of imprint resist (thermoplastic polymer) is spin coated onto the sample substrate. Spin coating is a procedure used to apply uniform Thin films to flat substrates In short an excess amount of a solution is placed on the substrate which is then rotated Then the mold, which has predefined topological patterns, is brought into contact with the sample and they are pressed together under certain pressure. When heated up above the glass transition temperature of the polymer, the pattern on the mold is pressed into the melt polymer film. After being cooled down, the mold is separated from the sample and the pattern resist is left on the substrate. A pattern transfer process (reactive ion etching, normally) can be used to transfer the pattern in the resist to the underneath substrate. Reactive ion etching ( RIE) is an etching technology used in Microfabrication. [1]
In Photo Nanoimprint Lithography (P-NIL), a photo(UV) curable liquid resist is applied to the sample substrate and the mold is normally made of transparent material like fused silica. Curing is a term in Polymer chemistry and Process engineering that refers to the toughening or hardening of a Polymer material by Cross-linking After the mold and the substrate are pressed together, the resist is cured in UV light and becomes solid. After mold separation, a similar pattern transfer process can be used to transfer the pattern in resist onto the underneath material. This is difficult to do in a vacuum, because a vacuum chuck would not be possible.
Electrochemical nanoimprinting[2] can be achieved using a stamp made from a superionic conductor such as silver sulfide. Fast ion conductors, also known as solid electrolytes and superionic conductors, are solid state Electrical conductors which conduct due to the Silver sulfide (or Silver sulphide in British English Ag2S is the Sulfide of Silver. When the stamp is contacted with metal, electrochemical etching can be carried out with an applied voltage. The electrochemical reaction generates metal ions which move from the original film into the stamp. Eventually all the metal is removed and the complementary stamp pattern is transferred to the remaining metal.
In a full wafer nanoimprint scheme, all the patterns are contained in a single nanoimprint field and will be transferred in a single imprint step. This allows a high throughput and uniformity. An at least 8" diameter full-wafer nanoimprint with high fidelity is possible.
To ensure the pressure and pattern uniformities of full wafer nanoimprint processes and prolong the mold lifetime, a pressing method utilizing isotropic fluid pressure, named Air Cushion Press (ACP)[3] by its inventors, is developed and being used by commercial nanoimprint systems.
Nanoimprint can be performed in a way similar to the step and repeat optical lithography. The imprint field (die) is typically much smaller than the full wafer nanoimprint field. The die is repeatedly imprinted to the substrate with certain step size. This scheme is good for nanoimprint mold creation. It is currently limited by the throughput, alignment and street width issues.
Nanoimprint lithography has been used to fabricate device for electrical, optical, photonic and biological applications. For electronics devices, NIL has been used to fabricate MOSFET, O-TFT, single electron memory. The metal–oxide–semiconductor field-effect transistor ( MOSFET, MOS-FET, or MOS FET) is a device used to amplify or switch electronic signals An Organic Field-Effect Transistor (OFET is a Field effect transistor using an Organic semiconductor in its channel For optics and photonics, intensive study has been conducted in fabrication of subwavelength resonant grating filter, polarizers, waveplate, anti-reflective structures, integrated photonics circuit and plasmontic devices by NIL. A polarizer is a device that converts an unpolarized or mixed- Polarization beam of Electromagnetic waves (e A wave plate or retarder is an optical device that alters the Polarization state of a Light wave travelling through it Photonics is the science of generating controlling and detecting Photons particularly in the visible and near Infra-red spectrum, but sub-10 nm nanofluidic channels had been fabricated using NIL and used in DNA strenching experiment. Currently, NIL is used to shrink the size of biomolecular sorting device an order of magnitude smaller and more efficient.
A key benefit of nanoimprint lithography is its sheer simplicity. The single greatest cost associated with chip fabrication is optical lithography tool used to print the circuit patterns. Optical lithography requires high powered excimer lasers and immense stacks of precision ground lens elements to achieve nanometer scale resolution. An excimer laser (sometimes and more correctly called an exciplex laser) is a form of ultraviolet laser which is commonly used in Eye surgery and Semiconductor There is no need for complex optics or high-energy radiation sources with a nanoimprint tool. There is no need for finely tailored photoresists designed for both resolution and sensitivity at a given wavelength. Photoresist is a Light -sensitive material used in several industrial processes such as Photolithography and Photoengraving to form a patterned coating The simplified requirements of the technology lead to its low cost.
Imprint lithography is inherently a three-dimensional patterning process. Imprint molds can be fabricated with multiple layers of topography stacked vertically. Resulting imprints replicate both layers with a single imprint step, which allows chip manufactures to reduce chip fabrication costs and improve product throughput. As mentioned above, the imprint material does not need to be finely tuned for high resolution and sensitivity. A broader range of materials with varying properties are available for use with imprint lithography. The increased material variability gives chemists the freedom to design new functional materials rather than sacrificial etch resistant polymers. [4] A functional material may be imprinted directly to form a layer in a chip with no need for pattern transfer into underlying materials. The successful implementation of a functional imprint material would result in significant cost reductions and increased throughput by eliminating many difficult chip fabrication processing steps. [5]
The key concerns for nanoimprint lithography are overlay, defects, template patterning and template wear.
The current overlay 3 sigma capability is 10 nm. In Probability and Statistics, the standard deviation is a measure of the dispersion of a collection of values A nanometre ( American spelling: nanometer, symbol nm) ( Greek: νάνος nanos dwarf; μετρώ metrό count) is a [6] Overlay has a better chance with step-and-scan approaches as opposed to full-wafer imprint.
As with immersion lithography, defect control is expected to improve as the technology matures. Immersion lithography is a Photolithography resolution enhancement technique that replaces the usual air gap between the final lens and the wafer surface with a liquid medium Defects from the template with size below the post-imprint process bias can be eliminated. Other defects would require effective template cleaning and/or the use of intermediate polymer stamps. When vacuum is not used during the imprint process, air can get trapped, resulting in bubble defects. [7] This is because the imprint resist layer and the template or stamp features are not perfectly flat. There is an elevated risk when the intermediate or master stamp contains depressions (which are especially easy air traps), or when the imprint resist is dispensed as droplets just before imprinting, rather than pre-spun onto the substrate. Sufficient time must be allowed for the air to escape. [8]
The template patterning can currently be performed by electron beam lithography or focused ion beam patterning; however at the smallest resolution, the throughput is very slow. Electron beam lithography (often abbreviated as e-beam lithography) is the practice of scanning a beam of Electrons in a patterned fashion across a surface covered Focused ion beam, also known as FIB, is a technique used particularly in the semiconductor and materials science fields for site-specific analysis deposition and ablation of As a result, optical patterning tools will be more helpful if they have sufficient resolution. Optical patterning tools are already in use for the manufacturing of photomasks. A photomask is an opaque plate with holes or transparencies that allow light to shine through in a defined pattern Other patterning techniques (including even double patterning) may also be used. Double patterning is a class of technologies developed for Photolithography to enhance the feature density
The use of substantial pressure to not only contact but also penetrate a layer during imprinting accelerates the wear of imprint templates compared to other types of lithographic masks.
Future applications of nanoimprint lithography may involve the use of porous low-k materials. In Semiconductor manufacturing a Low-κ Dielectric is a material with a small Dielectric constant relative to silicon dioxide These materials are not stiff and, as part of the substrate, are readily damaged mechanically by the pressure of the imprint process.
A key characteristic of nanoimprint lithography (except for electrochemical nanoimprinting) is the residual layer following the imprint process. It is preferable to have thick enough residual layers to support alignment and throughput and low defects. [9] However, this renders the nanoimprint lithography step less critical for critical dimension (CD) control than the etch step used to remove the residual layer. Hence, it is important to consider the residual layer removal an integrated part of the overall nanoimprint patterning process. [10] In a sense, the residual layer etch is similar to the develop process in conventional lithography. It has been proposed to combine photolithography and nanoimprint lithography techniques in one step in order to eliminate the residual layer. [11]
Nanoimprint lithography relies on displacing polymer. This could lead to systematic effects over long distances. For example, a large, dense array of protrusions will displace significantly more polymer than an isolated protrusion. Depending on the distance of this isolated protrusion from the array, the isolated feature may not imprint correctly due to polymer displacement and thickening. Resist holes can form in between groups of protrusions. [12] Likewise, wider depressions in the template do not fill up with as much polymer as narrower depressions, resulting in misshapen wide lines. In addition, a depression at the edge of a large array fills up much earlier than one located in the center of the array, resulting in within-array uniformity issues.
A unique benefit of nanoimprint lithography is the ability to pattern 3D structures, such as damascene interconnects and T-gates, in fewer steps than required for conventional lithography. Copper-based chips are Semiconductor Integrated circuits usually Microprocessors which use Copper for Interconnections Since copper This is achieved by building the T-shape into the protrusion on the template. [13]
Nanoimprint lithography is a simple pattern transfer process that is neither limited by diffraction nor scattering effects nor secondary electrons, and does not require any sophisticated radiation chemistry. It is also a potentially simple and inexpensive technique. However, a lingering barrier to nanometer-scale patterning is the current reliance on other lithography techniques to generate the template. It is possible that self-assembled structures will provide the ultimate solution for templates of periodic patterns at scales of 10 nm and less. Self-assembly is a term used to describe processes in which a disordered system of pre-existing components forms an organized structure or pattern as a consequence of specific local [14] It is also possible to resolve the template generation issue by using a programmable template[15] in a scheme based on double patterning. Double patterning is a class of technologies developed for Photolithography to enhance the feature density
As of October 2007, Toshiba is the only company to have validated nanoimprint lithography for 22 nm and beyond. ( is a multinational conglomerate manufacturing company headquartered in Tokyo, Japan. [16] What is more significant is that nanoimprint lithography is the first sub-30 nm lithography to be validated by an industrial user.