Memory-mapped I/O - Citizendia

For more generic meanings of input/output port, see Computer port (hardware). In Computer hardware, a 'port' serves as an interface between the computer and other computers or peripheral devices

Memory-mapped I/O (MMIO) and port I/O (also called port-mapped I/O or PMIO) are two complementary methods of performing input/output between the CPU and peripheral devices in a computer. In Computing, input/output, or I/O, refers to the communication between an Information processing system (such as a Computer) and the outside In Computer hardware, a peripheral device is any device attached to a computer in order to expand its functionality (basically input and output devices together are known A computer is a Machine that manipulates data according to a list of instructions. Another method, not discussed in this article, is using dedicated I/O processors—commonly known as channels on mainframe computers—that execute their own instructions. In Computer science, channel I/O is a generic term that refers to a high-performance Input/output (I/O architecture that is implemented in various forms on a number Mainframes (often colloquially referred to as Big Iron) are Computers used mainly by large organizations for critical applications typically bulk data In Computer science, an instruction is a single operation of a processor defined by an Instruction set architecture.

Memory-mapped I/O (not to be confused with memory-mapped file I/O) uses the same address bus to address both memory and I/O devices, and the CPU instructions used to access the memory are also used for accessing devices. A memory-mapped file is a segment of Virtual memory which has been assigned a direct byte-for-byte correlation with some portion of a file or file-like resource An address bus is a Computer bus, controlled by CPUs or DMA -capable Peripherals for specifying the Physical addresses of computer In order to accommodate the I/O devices, areas of CPU's addressable space must be reserved for I/O rather than memory. The reservation might be temporary—the Commodore 64 could bank switch between its I/O devices and regular memory— or permanent. Bank switching (also known as "paging" but only loosely related to the ordinary meaning of " Paging " in computing was a technique common in 8-bit Each I/O device monitors the CPU's address bus and responds to any CPU's access of device-assigned address space, connecting the data bus to a desirable device's hardware register. In Computer architecture, a bus is a subsystem that transfers data between computer components inside a Computer or between computers In Digital electronics, especially Computing, a hardware register stores bits of information in a way that all the bits can be written to or read out simultaneously

Port-mapped I/O uses a special class of CPU instructions specifically for performing I/O. This is generally found on Intel microprocessors, specifically the IN and OUT instructions which can read and write a single byte to an I/O device. This generational and chronological list of Intel microprocessors attempts to present all of Intel 's processors from the pioneering 4-bit 4004 I/O devices have a separate address space from general memory, either accomplished by an extra "I/O" pin on the CPU's physical interface, or an entire bus dedicated to I/O. In Computer architecture, a bus is a subsystem that transfers data between computer components inside a Computer or between computers

A device's direct memory access (DMA) is not affected by those CPU-to-device communication methods, especially it is not affected by memory mapping. Direct memory access ( DMA) is a feature of modern Computers and Microprocessors that allows certain hardware subsystems within the computer to access system This is because, by definition, DMA is a memory-to-device communication method, that bypasses the CPU.

Hardware interrupt is yet another communication method between CPU and peripheral devices. In Computing, an interrupt is an asynchronous signal from hardware indicating the need for attention or a synchronous event in software indicating the need for a change However, it is always treated separately for a number of reasons. It is device-initiated, as opposed to above CPU-initiated methods. It is also unidirectional, as information flows only from device to CPU. Lastly, each interrupt line carries itself only one bit of information with a fixed meaning, namely "there is an interrupt". A bit is a binary digit, taking a value of either 0 or 1 Binary digits are a basic unit of Information storage and communication

1 Relative merits of the two I/O methods
2 Example
3 Basic types of address decoding
4 Incomplete address decoding
5 See also

Relative merits of the two I/O methods

The main advantage of using port-mapped I/O is on CPUs with a limited addressing capability. Because port-mapped I/O separates I/O access from memory access, the full address space can be used for memory. It is also obvious to a person reading an assembly language program listing when I/O is being performed, due to the special instructions that can only be used for that purpose. See the terminology section below for information regarding inconsistent use of the terms assembly and assembler

I/O operations can slow the memory access, if the address and data buses are shared. This is because the peripheral device is usually much slower than main memory. In some architectures, port-mapped I/O operates via a dedicated I/O bus, alleviating the problem.

The advantage of using memory-mapped I/O is that, by discarding the extra complexity that port I/O brings, a CPU requires less internal logic and is thus cheaper, faster and easier to build; this follows the basic tenets of reduced instruction set computing, and is also advantageous in embedded systems. An embedded system is a special-purpose Computer system designed to perform one or a few dedicated functions often with Real-time computing constraints The fact that regular memory instructions are used to address devices also means that all of the CPUs addressing modes are available for the I/O as well as the memory. As 16-bit peripherals have become obsolete and replaced with 32-bit and 64-bit in general use, reserving ranges of memory address space for I/O become less of a problem. The range of Integer values that can be stored in 32 bits is 0 through 4294967295 or −2147483648 through 2147483647 using Two's complement encoding '64-bit' CPUs have existed in Supercomputers since the 1960s and in RISC -based workstations and servers since the early 1990s.

Example

Consider a simple system built around an 8-bit microprocessor. Eight-bit CPUs normally use an 8-bit data bus and a 16-bit address bus which means that their Address space is limited to 64 KBs This is not a "natural A microprocessor incorporates most or all of the functions of a Central processing unit (CPU on a single Integrated Such a CPU might provide 16-bit address lines, allowing it to address up to 64 kibibytes (KiB) of memory. A kibibyte (a contraction of ki lo bi nary byte) is a unit of Information or Computer storage, established by the International On such a system, perhaps the first 32 KiB of address space would be allotted to random access memory (RAM), another 16K to read only memory (ROM) and the remainder to a variety of other devices such as timers, counters, video display chips, sound generating devices, and so forth. The hardware of the system is arranged so that devices on the address bus will only respond to particular addresses which are intended for them; all other addresses are ignored. This is the job of the address decoding circuitry, and it is this that establishes the memory map of the system.

Thus we might end up with a memory map like so:

Device	Address range (hexadecimal)	Size
RAM	0000 - 7FFF	32 KiB
General purpose I/O	8000 - 80FF	256 bytes
Sound controller	9000 - 90FF	256 bytes
Video controller/text-mapped display RAM	A000 - A7FF	2 KiB
ROM	C000 - FFFF	16 KiB

Note that this memory map contains gaps; that is also quite common. In Mathematics and Computer science, hexadecimal (also base -, hexa, or hex) is a Numeral system with a

Assuming the fourth register of the video controller sets the background colour of the screen, the CPU can set this colour by writing a value to the memory location A003 using its standard memory write instruction. Using the same method, glyphs can be displayed on a screen by writing character values into a special area of RAM within the video controller. Prior to cheap RAM that enabled bit-mapped displays, this character cell method was a popular technique for computer video displays (see Text user interface). In Computer graphics, a bitmap or pixmap is a type of memory organization or Image file format used to store Digital images The TUI short for Text User Interface or Textual User Interface (and sometimes Terminal User Interface) is a Retronym that was coined sometime

Basic types of address decoding

Exhaustive - 1:1 mapping of unique addresses to one hardware register (physical memory location)
Partial - n:1 mapping of n unique addresses to one hardware register. Partial decoding allows a memory location to have more than one address, allowing the programmer to reference a memory location using n different addresses. Synonyms: foldback, multiply-mapped, partially-mapped.
Linear - Address lines are used directly without any logic

Incomplete address decoding

Addresses may be decoded completely or incompletely by a device.

Complete decoding involves checking every line of the address bus, causing an open data bus when the CPU accesses an unmapped region of memory. An address bus is a Computer bus, controlled by CPUs or DMA -capable Peripherals for specifying the Physical addresses of computer In Computer architecture, a bus is a subsystem that transfers data between computer components inside a Computer or between computers
Incomplete decoding, or partial decoding, uses simpler and often cheaper logic that examines only some address lines. Such simple decoding circuitry might allow a device to respond to several different addresses, effectively creating virtual copies of the device at different places in the memory map. All of these copies refer to the same real device, so there is no particular advantage in doing this, except to simplify the decoder. Commonly, the decoding itself is programmable, so the system can reconfigure its own memory map as required.

Contents

Relative merits of the two I/O methods

Example

Basic types of address decoding

Incomplete address decoding

See also