HyperTransport (HT), formerly known as Lightning Data Transport (LDT), is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001. In Computing, memory latency is the time between initiating a request for a Byte or word in memory until it is retrieved Point-to-point telecommunications generally refers to a connection restricted to two endpoints usually host computers Events 68 - Galba, Governor of Hispania, names himself legatus senatus populique Romani, breaking the line of Year 2001 ( MMI) was a Common year starting on Monday according to the Gregorian calendar. [1] The HyperTransport Consortium is in charge of promoting and developing HyperTransport technology. The HyperTransport Consortium is an industry consortium responsible for specifying and promoting the computer bus technology called HyperTransport. The technology is used by AMD and Transmeta in x86 processors, PMC-Sierra, Broadcom, and Raza Microelectronics in MIPS microprocessors, AMD, NVIDIA, VIA and SiS in PC chipsets, HP, Sun Microsystems, IBM, and Flextronics in servers, Cray, Newisys, QLogic, and XtremeData, Inc. Transmeta Corporation ( is a US -based Corporation that licenses low power semiconductor IP See also X86 assembly language The generic term x86 refers to the most commercially successful Instruction set architecture in the history of Personal For the former computer game manufacturer see Sierra Entertainment. Broadcom Corporation is an American supplier of Integrated circuits (ICs for broadband communications RMI Corporation, also known as RMI, formerly known as Raza Microelectronics Inc MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies The multinational NVIDIA Corporation ( (ɪnˈvɪdiə specializes in the manufacture of graphics-processor technologies for Workstations VIA Technologies ( is a Taiwanese manufacturer of Integrated circuits mainly Motherboard Chipsets CPUs, and memory, and Silicon Integrated Systems (SiS Traditional Chinese: 矽統科技) is a company that manufactures among other things motherboard chipsets Sun Microsystems Inc ( is a multinational vendor of Computers computer components Computer software, and Information technology services International Business Machines Corporation abbreviated IBM and nicknamed "Big Blue", is a multinational Computer Technology Cray Inc ( is a Supercomputer manufacturer based in Seattle Washington. Newisys, a Server and Storage company with expertise in glue-chips for Opterons based in Austin Texas was founded by Phil Hester (who later was AMD 's QLogic Corporation is a Aliso Viejo California[http //wwwhoovers in high performance computing, and Cisco Systems in routers.
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HyperTransport comes in three major versions — 1. 0, 2. 0, and 3. 0 — which run from 200 MHz to 2. The hertz (symbol Hz) is a measure of Frequency, informally defined as the number of events occurring per Second. 6 GHz (compared to PCI at either 33 or 66 MHz). The hertz (symbol Hz) is a measure of Frequency, informally defined as the number of events occurring per Second. The Peripheral Component Interconnect, or PCI Standard (commonly PCI) specifies a Computer bus for attaching peripheral devices to a Computer It is also a DDR or "Double Data Rate" connection, meaning it sends data on both the rising and falling edges of the clock signal. In Computing, a Computer bus operating with double data rate transfers data on both the rising and falling edges of the Clock signal. In Electronics and especially synchronous Digital circuits a clock signal is a signal used to coordinate the actions of two or more circuits This allows for a maximum data rate of 5200 MT/s when running at 2. Gigatransfer (GT and Megatransfer (MT are terms used in computer technology referring to a number of data transfers (or operations 6 GHz; this frequency is auto-negotiated.
HyperTransport supports an auto-negotiated bit width, based on two 2-bit lines to 32-bit lines. A bit is a binary digit, taking a value of either 0 or 1 Binary digits are a basic unit of Information storage and communication The full-sized, full-speed, 32-bit interconnect has a transfer rate of 20. 8 GB/s (2. A gigabyte (derived from the SI prefix Giga-) is a unit of Information or Computer 6 GHz * (32 bits / 8)) per direction, or 41. 6 GB/s aggregated bandwidth per link, making it much faster than many existing standards. Links of various widths can be mixed together into a single application (for example, 2x8 instead of 1x16), which allows for higher speed interconnects between main memory and the CPU, and lower speed interconnects among peripherals as appropriate. For an account of the words periphery and peripheral as they are used in biology sociology politics computer hardware and other fields see the The technology also has much lower latency than other solutions.
HyperTransport is packet-based, with each packet always consisting of a set of 32-bit words, regardless of the physical width of the connection. In Information technology, a packet is a formatted unit of Data carried by a Packet mode Computer network. The range of Integer values that can be stored in 32 bits is 0 through 4294967295 or −2147483648 through 2147483647 using Two's complement encoding The first word in a packet is always a command word. If a packet contains an address, then the last 8 bits of the command word are chained with the next 32-bit word in order to make a 40-bit address. An additional 32-bit control packet is allowed to be prepended when 64-bit addressing is required. The remaining 32-bit words in a packet are the data payload. Transfers are always padded to a multiple of 32 bits, regardless of their actual length.
HyperTransport packets enter the interconnect in segments known as bit times. The number of bit times that it necessitates depends on the width of the interconnect. HyperTransport can be used for generating system management messages, signaling interrupts, issuing probes to adjacent devices or processors, and general I/O and data transactions. In Computing, input/output, or I/O, refers to the communication between an Information processing system (such as a Computer) and the outside There are usually two different kinds of write commands that can be used - posted and non-posted. Posted writes are ones that do not require a response from the target. This is usually used for high bandwidth devices such as Uniform Memory Access traffic or Direct memory access transfers. Uniform Memory Access (UMA is a Shared memory architecture used in Parallel computers All the processors in the UMA model share the physical memory uniformly Direct memory access ( DMA) is a feature of modern Computers and Microprocessors that allows certain hardware subsystems within the computer to access system Non-posted writes require a response from the receiver in the form of a "target done". Reads also cause the receiver to generate a read response.
HyperTransport also facilitates power management as it is compliant with the Advanced Configuration and Power Interface specification. Power management is a feature of some electrical appliances especially copiers, computers and computer Peripherals such as monitors and The Advanced Configuration and Power Interface ( ACPI) specification an open industry standard first released in December 1996 (developed by HP, Intel This means that changes in processor sleep states (C states) can signal changes in device states (D states), e. g. powering off disks when the CPU goes to sleep.
Electrically, HyperTransport is similar to Low Voltage Differential Signaling (LVDS) operating at 2. Low-voltage differential signaling, or LVDS, is an electrical signaling system that can run at very high speeds over inexpensive Twisted-pair copper cables 5 V.
There has been marketing confusion between the use of HT referring to HyperTransport and the use of HT to refer to Intel's Hyper-Threading feature of some Pentium 4 based microprocessors. Hyper-threading (officially termed Hyper-Threading Technology or HTT) is an Intel-proprietary technology The Pentium 4 brand refers to Intel 's line of single- core mainstream desktop and Laptop Central processing units (CPUs introduced Hyper-Threading is officially known as Hyper-Threading Technology (HTT) or HT-Technology. Because of this potential for confusion, the HyperTransport Consortium always uses the written out form: "HyperTransport".
The primary use for HyperTransport is to replace the front-side bus, which is currently different for every type of machine. In Personal computers the Front Side Bus ( FSB) is the bus that carries data between the CPU and the northbridge. For instance, a Pentium cannot be plugged into a PCI bus. The Pentium brand refers to Intel 's single-core x86 Microprocessor based on the P5 fifth-generation Microarchitecture. The Peripheral Component Interconnect, or PCI Standard (commonly PCI) specifies a Computer bus for attaching peripheral devices to a Computer In order to expand the system, the front-side bus must connect through adaptors for the various standard buses, like AGP or PCI. These are typically included in the respective controller functions, namely the northbridge and southbridge. The northbridge, also known as the memory controller hub ( MCH) in Intel systems (AMD VIA SiS and others usually use 'northbridge' is traditionally one The Southbridge, also known as the I/O Controller Hub ( ICH) in Intel systems (AMD VIA SiS and others usually
In theory, a similar computer implemented with HyperTransport is faster and more flexible. A single PCI↔HyperTransport adaptor chip will work with any HyperTransport enabled microprocessor and allow the use of PCI cards with these processors. For example, the NVIDIA nForce chipset uses HyperTransport to connect its north and south bridges. The multinational NVIDIA Corporation ( (ɪnˈvɪdiə specializes in the manufacture of graphics-processor technologies for Workstations Innovations Dual Channel & GeForce2 MX IGP The nForce chipset introduced a dual-channel memory controller to the mainstream motherboard market doubling theoretical throughput
Another use for HyperTransport is as an interconnect for NUMA multiprocessor computers. Non-Uniform Memory Access or Non-Uniform Memory Architecture ( NUMA) is a computer memory design used in Multiprocessors where the memory access Multiprocessing is the use of two or more central processing units (CPUs within a single computer system AMD uses HyperTransport with a proprietary cache coherency extension as part of their Direct Connect Architecture in their Opteron and Athlon 64 FX (Dual Socket Direct Connect (DSDC) Architecture) line of processors. In computing Cache coherency (also cache coherence) refers to the integrity of data stored in local caches of a shared resource The Direct Connect Architecture is the I/O architecture of the Athlon 64 X2, Opteron, and Phenom Microprocessors from AMD. The Opteron is AMD 's X86 server processor line and was the first processor to implement the AMD64 Instruction set architecture (known The Athlon 64 is an eighth-generation AMD64 architecture Microprocessor produced by AMD, released on The AMD Quad FX platform is an AMD platform targeted at enthusiasts which allows users to plug two Socket F Athlon 64 FX or 2-way Opteron The HORUS interconnect from Newisys extends this concept to larger clusters. The Horus system, designed by Newisys for AMD, was created to enable AMD Opteron machines to extend beyond the current limit of 8-way ( CPU sockets
HyperTransport can also be used as a bus in routers and switches. A router ('rautər in the USA 'rutər in the UK and Ireland, or either pronunciation in Australia and Canada is a Computer whose software and hardware are usually A Routers and switches have multiple network interfaces and data has to be forwarded between these ports as fast as possible e. g. a four port 100 Mbit/s Ethernet router needs a maximum 800 Mbit/s of internal bandwidth (100 Mbit/s * 4 ports * 2 directions). A megabit is a unit of Information or computer storage abbreviated Mbit (or Mb) Ethernet is a family of frame -based Computer networking technologies for Local area networks (LANs HyperTransport greatly exceeds the bandwidth needed for this application. However, HyperTransport has largely fallen out of favour with the networking community, in favour of SPI 4. The System Packet Interface family of Interoperability Agreements from the Optical Internetworking Forum specify chip-to-chip channelized packet interfaces commonly used in 2 and PCI Express. Not to be confused with PCI-X, a different bus architecture Peripheral Component Interconnect Express, officially abbreviated as PCI-E
The issue of bandwidth between CPUs and co-processors has usually been the major stumbling block to their practical implementation. After years without an officially recognized one, a connector designed for such expansion using a HyperTransport interface was introduced and is known as HyperTransport eXpansion (HTX). Using the same mechanical connector as a 16-lane PCI-Express slot (plus an x1 connector for power pins), HTX allows plug-in cards to be developed which support direct access to a CPU and DMA access to the system RAM. Not to be confused with PCI-X, a different bus architecture Peripheral Component Interconnect Express, officially abbreviated as PCI-E Direct memory access ( DMA) is a feature of modern Computers and Microprocessors that allows certain hardware subsystems within the computer to access system The initial card for this slot was the QLogic InfiniPath InfiniBand HCA. Recently, co-processors such as FPGAs have appeared which can access the HyperTransport bus and become first-class citizens on the motherboard. FPGAs should not be confused with the Flip-chip pin grid array, a form of integrated circuit packaging Current generation FPGAs from both of the main manufacturers (Altera and Xilinx) can directly support the HyperTransport interface and have IP Cores available. Altera Corporation ( is one of the two major manufacturer of high-end PLDs ( Programmable logic devices, along with Xilinx. Xilinx Inc ( is the world's largest developer and fabless manufacturer of a class of reconfigurable hardware chips known as Field-programmable gate arrays In Electronic design a Semiconductor intellectual property core, IP block, IP core, or logic core is a reusable unit of logic cell Companies such as XtremeData, Inc. take these FPGAs (Altera in this example) and create a module that allows FPGAs to be plugged directly into the Opteron socket.
As of January 2008, the HTX standard is limited to 16 bits and 800 MHz, making it slower than the PCI-E standard from which it borrows its connector. [2] An earlier Samtec test connector,[3] however, achieved full 32-bit, 2. 8 GHz operation.
AMD has announced an initiative named Torrenza in September 21, 2006 to further promote the usage of HyperTransport for plug-in cards and coprocessors. Torrenza is an initiative announced by AMD to improve support for the integration of specialized co-processors in systems based on AMD Opteron microprocessors Events 1217 - The Estonian tribal leader Lembitu of Lehola was killed in a battle against Teutonic Knights. Year 2006 ( MMVI) was a Common year starting on Sunday of the Gregorian calendar. A coprocessor is a Computer processor used to supplement the functions of the primary processor (the CPU
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Year | Max. MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies Broadcom Corporation is an American supplier of Integrated circuits (ICs for broadband communications For the former computer game manufacturer see Sierra Entertainment. MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies OpenCores is a loose community of people who are interested in developing Digital Open source hardware through Electronic design automation, with a similar The multinational NVIDIA Corporation ( (ɪnˈvɪdiə specializes in the manufacture of graphics-processor technologies for Workstations Models nForce4/nForce4-4x nForce4 is the second evolutional MCP and incorporates both Northbridge and Southbridge on a single die Specifications Support for NVIDIA SLI technology including Quad SLI (enabling the simultaneous use of four GPUs and SLI LinkBoost developments AMD Chipsets nForce 680a SLI Specially made for the AMD Quad FX platform proposed by AMD providing a total of two CPUs and multiple graphic cards configuation AMD CPUs nForce 780a Codenamed MCP72XE motherboard GPU (mGPU DirectX 10 compliant Broadcom Corporation is an American supplier of Integrated circuits (ICs for broadband communications International Business Machines Corporation abbreviated IBM and nicknamed "Big Blue", is a multinational Computer Technology The PowerPC 970, PowerPC 970FX, PowerPC 970GX, and PowerPC 970MP, are 64-bit Power Architecture processors from IBM RMI Corporation, also known as RMI, formerly known as Raza Microelectronics Inc HT Frequency | Max. Link Width | Max. Aggregate Bandwidth (bi-directional) |
|---|---|---|---|---|
| 1. 0 | 2001 | 800 MHz | 32 Bit | 12. 8 GB/s |
| 1. 1 | 2002 | 800 MHz | 32 Bit | 12. 8 GB/s |
| 2. 0 | 2004 | 1. 4 GHz | 32 Bit | 22. 4 GB/s |
| 3. 0 | 2006 | 2. 6 GHz | 32 Bit | 41. 6 GB/s |