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Hyper-threading (officially termed Hyper-Threading Technology or HTT) is an Intel-proprietary technology used to improve parallelization of computations performed on PC microprocessors via simultaneous multithreading. Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of Superscalar CPUs with Hardware It is an improvement on super-threading. Super-threading is a multithreading approach that weaves together the execution of different threads on a single processor without truly executing them at the same time It debuted in U. S. Patent 4,847,755 (Gordon Morrison, et. al) and can be seen in use on the Intel Xeon processors and Pentium 4 processors. The Xeon brand refers to many families of Intel 's x86 Multiprocessing CPUs – for dual-processor (DP and multi-processor (MP configuration The Pentium 4 brand refers to Intel 's line of single- core mainstream desktop and Laptop Central processing units (CPUs introduced The technology improves processor performance under certain workloads by providing useful work for execution units that would otherwise be idle, for example during a cache miss. In Computer engineering, an execution unit is a part of a CPU that performs the operations and calculations called for by the program. A Pentium 4 with Hyper-Threading enabled is treated by the operating system as two processors instead of one. An operating system (commonly abbreviated OS and O/S) is the software component of a Computer system that is responsible for the management and coordination

Hyper-threading relies on support in the operating system as well as the CPU. Conventional multiprocessor support is not enough to take advantage of hyper-threading. [1] For example, even though Windows 2000 supports multiple CPUs, Intel does not recommend that hyper-threading be enabled under that operating system.

Contents

Performance

The advantages of Hyper-Threading are listed as: improved support for multi-threaded code, allowing multiple threads to run simultaneously, improved reaction and response time.

According to Intel, the first implementation only used an additional 5% of the die area over the comparable non-hyperthreaded processor, yet yielded performance improvements of 15–30%.

Intel claims up to a 30% speed improvement compared against an otherwise identical, non-simultaneous multithreading Pentium 4. Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of Superscalar CPUs with Hardware The performance improvement seen is very application-dependent, however, and some programs actually slow down slightly when Hyper Threading Technology is turned on. This is due to the replay system of the Pentium 4 tying up valuable execution resources, thereby starving the other thread. The Replay system is a little known subsystem within the Intel Pentium 4 processor (The Pentium 4 Prescott core gained a replay queue, which reduces execution time needed for the replay system, but this is not enough to completely overcome the performance hit. ) However, any performance degradation is unique to the Pentium 4 (due to various architectural nuances), and is not characteristic of simultaneous multithreading in general. Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of Superscalar CPUs with Hardware

Details

Hyper-Threading works by duplicating certain sections of the processor—those that store the architectural state—but not duplicating the main execution resources. The architectural state is the part of the CPU which holds the state of a process this includes Control registers ** Instruction Flag Registers (such This allows a Hyper-Threading equipped processor to pretend to be two "logical" processors to the host operating system, allowing the operating system to schedule two threads or processes simultaneously. Where execution resources in a non-Hyper-Threading capable processor are not used by the current task, and especially when the processor is stalled, a Hyper-Threading equipped processor may use those execution resources to execute another scheduled task. (The processor may stall due to a cache miss, branch misprediction, or data dependency. Branch misprediction occurs when a Central processing unit (CPU mispredicts the next instruction to process in Branch prediction, which is aimed at speeding up execution A data dependency in computer science is a situation in which a program statement (instruction refers to the data of a preceding statement )

Except for its performance implications, this innovation is transparent to operating systems and programs. All that is required to take advantage of Hyper-Threading is symmetric multiprocessing (SMP) support in the operating system, as the logical processors appear as standard separate processors. In Computing, symmetric multiprocessing or SMP involves a Multiprocessor computer-architecture where two or more identical processors can connect to a single An operating system (commonly abbreviated OS and O/S) is the software component of a Computer system that is responsible for the management and coordination

However, it is possible to optimize operating system behavior on Hyper-Threading capable systems, such as the Linux techniques discussed in Kernel Traffic. For example, consider an SMP system with two physical processors that are both Hyper-Threaded (for a total of four logical processors). If the operating system's process scheduler is unaware of Hyper-Threading, it would treat all four processors the same. Scheduling is a key concept in Computer multitasking and Multiprocessing Operating system design and in Real-time operating system design As a result, if only two processes are eligible to run, it might choose to schedule those processes on the two logical processors that happen to belong to one of the physical processors. Thus, one CPU would be extremely busy while the other CPU would be completely idle, leading to poor overall performance. This problem can be avoided by improving the scheduler to treat logical processors differently from physical processors; in a sense, this is a limited form of the scheduler changes that are required for NUMA systems. Non-Uniform Memory Access or Non-Uniform Memory Architecture ( NUMA) is a computer memory design used in Multiprocessors where the memory access

Security

In May 2005 Colin Percival presented a paper, Cache Missing for Fun and Profit (PDF file), demonstrating that a malicious thread operating with limited privileges can monitor the execution of another thread through their influence on a shared data cache, allowing for the theft of cryptographic keys. Note that while the attack described in the paper was demonstrated on an Intel Pentium 4 with HyperThreading processor, the same techniques could theoretically apply to any system where caches are shared between two or more non-mutually-trusted execution threads; see also side channel attack. In Cryptography, a side channel attack is any attack based on information gained from the physical Implementation of a Cryptosystem, rather than brute

Future

Older Pentium 4 based CPUs use Hyper-Threading, but the current-generation Pentium M based cores Merom, Conroe, and Woodcrest do not. Overview The Pentium M represented a new and radical departure for Intel as it was not a low-power version of the desktop-oriented Pentium 4, but instead a heavily modified The Core 2 brand refers to a range of Intel 's consumer 64-bit dual-core and 2x2 MCM quad-core CPUs with the X86-64 instruction set The Core 2 brand refers to a range of Intel 's consumer 64-bit dual-core and 2x2 MCM quad-core CPUs with the X86-64 instruction set The Xeon brand refers to many families of Intel 's x86 Multiprocessing CPUs – for dual-processor (DP and multi-processor (MP configuration Hyper-Threading is a specialized form of simultaneous multithreading (SMT), which has been said to be on Intel's plans for the generation after Merom, Conroe and Woodcrest. Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of Superscalar CPUs with Hardware

More recently Hyper-Threading has been criticised as being energy inefficient. For example, specialist low-power CPU design company ARM has stated SMT can use up to 46% more power than dual CPU designs. Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of Superscalar CPUs with Hardware Furthermore, they claim SMT increases cache thrashing by 42%, whereas dual core results in a 37% decrease[1]. Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of Superscalar CPUs with Hardware In Computer science, thrash (verb is the term used to describe a degenerate situation on a computer where increasing resources are used to do a decreasing amount of work A multi-core processor (or chip-level multiprocessor, CMP) combines two or more independent cores into a single package composed of a single Integrated These considerations are claimed to be the reason Intel dropped SMT from the following microarchitecture. Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of Superscalar CPUs with Hardware In Computer engineering, microarchitecture (sometime abbreviated to µarch or uarch is a description of the Electrical circuitry of a Computer, Central

However, for 2008 Intel has claimed that the upcoming Nehalem will see the return of Hyper-Threading. Nehalem is projected to contain up to 8 cores and will be able to effectively scale 16+ threads. [2]

See also

References

  1. ^ Operating Systems that include optimizations for Hyper-Threading Technology
  2. ^ Intel Details Upcoming New Processor Generations

External links

Security
Performance problems

Sources

Replay: Unknown Features of the NetBurst Core [3]

KernelTrap is a computing news website which covers topics related to the development of free and open source operating system kernels and especially the Linux
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