In personal computers, the Front Side Bus (FSB) is the data transfer bus that carries information between the CPU and the northbridge of the Motherboard. A personal computer ( PC) is any Computer whose original sales price size and capabilities make it useful for individuals and which is intended to be operated In Computer architecture, a bus is a subsystem that transfers data between computer components inside a Computer or between computers The northbridge, also known as the memory controller hub ( MCH) in Intel systems (AMD VIA SiS and others usually use 'northbridge' is traditionally one
Some computers also have a back side bus which connects the CPU to a memory cache. In Personal computer Microprocessor architecture a back side bus ( BSB) or backside bus, is a Computer bus used to connect the This bus and the cache memory connected to it are faster than accessing the system RAM via the front side bus.
The bandwidth or maximum theoretical throughput of the front side bus is determined by the product of the width of its data path, its clock frequency (cycles per second) and the number of data transfers it performs per clock cycle. The clock rate is the fundamental rate in cycles per second (measured in Hertz) at which a Computer performs its most basic operations such as adding two For example, a 32-bit (4-byte) wide FSB operating at a frequency of 100 MHz that performs 4 transfers per cycle has a bandwidth of 1600 megabytes per second (MB/s). A bit is a binary digit, taking a value of either 0 or 1 Binary digits are a basic unit of Information storage and communication A byte (pronounced "bite" baɪt is the basic unit of measurement of information storage in Computer science. A megabyte is a unit of Information or Computer storage equal to either 106 (1000000 Bytes or 220 (1048576 bytes depending on
The number of transfers per clock cycle is dependent on the technology used. For example, GTL+ performs 1 transfer/cycle, EV6 2 transfers/cycle, and AGTL+ 4 transfers/cycle. Gunning Transceiver Logic or GTL is a type of logic signalling used to drive electronic Backplane buses It has a Voltage swing between Intel calls the technique of 4 transfers per cycle Quad Pumping. Quad data rate (or quad pumping) is a communication signaling technique wherein data is transmitted at both the rising and falling edges of the clock signal much the same way
Notice that many manufacturers today publish the speed of the FSB in megatransfers per second (MT/s), not the FSB clock frequency in megahertz (MHz). Gigatransfer (GT and Megatransfer (MT are terms used in computer technology referring to a number of data transfers (or operations This is because the actual speed is determined by how many transfers can be performed each clock cycle as well as by the clock frequency. For example, if a motherboard (or processor) has a FSB clocked at 200 MHz and performs 4 transfers per clock cycle, the FSB is rated at 800 MT/s.
The front side bus is an alternative name for the data and address buses of the CPU as defined by the manufacturer's datasheet. A datasheet is a Document summarizing the performance and other characteristics of a component (e The term is mostly associated with the various CPU buses used on PC-related motherboards (including servers etc), seldom with the data and address buses used in embedded systems and similar small computers. A motherboard is the central or primary Printed circuit board (PCB making up a complex electronic system such as a modern Computer or Laptop An embedded system is a special-purpose Computer system designed to perform one or a few dedicated functions often with Real-time computing constraints
Front side buses serve as a connection between the CPU and the rest of the hardware via a so called chipset. A chipset is a group of Integrated circuits or chips that are designed to work together and are usually marketed as a single product This chipset is usually divided in a northbridge and a southbridge part, and is the connection points for all other buses in the system. The northbridge, also known as the memory controller hub ( MCH) in Intel systems (AMD VIA SiS and others usually use 'northbridge' is traditionally one The Southbridge, also known as the I/O Controller Hub ( ICH) in Intel systems (AMD VIA SiS and others usually Buses like the PCI, AGP, and memory buses all connect to the chipset in order for data to flow between the connected devices. The Peripheral Component Interconnect, or PCI Standard (commonly PCI) specifies a Computer bus for attaching peripheral devices to a Computer These secondary system buses usually run at speeds derived from the front side bus clock, but are not necessarily synchronous to it.
In response to AMD's Torrenza initiative, Intel has opened its FSB CPU socket to third party devices . Torrenza is an initiative announced by AMD to improve support for the integration of specialized co-processors in systems based on AMD Opteron microprocessors Prior to this announcement, made in Spring 2007 at Intel Developer Forum in Beijing, Intel had very closely guarded who had access to the FSB, only allowing Intel processors in the CPU socket. Intel Developer Forum (IDF is a gathering of technologists to discuss Intel products and products based around Intel products This is now changing, the first example being FPGA co-processors, a result of collaboration between Intel-Xilinx-Nallatech  and Intel-Altera-XtremeData  . FPGAs should not be confused with the Flip-chip pin grid array, a form of integrated circuit packaging Xilinx Inc ( is the world's largest developer and fabless manufacturer of a class of reconfigurable hardware chips known as Field-programmable gate arrays Nallatech is a Scottish computer hardware and software firm based in Cumbernauld in North Lanarkshire, Scotland that specializes in and Altera Corporation ( is one of the two major manufacturer of high-end PLDs ( Programmable logic devices, along with Xilinx.
The frequency at which a processor (CPU) operates is determined by applying a clock multiplier to the front side bus (FSB) speed. Frequency is a measure of the number of occurrences of a repeating event per unit Time. For example, a processor running at 550 MHz might be using a 100 MHz FSB. The hertz (symbol Hz) is a measure of Frequency, informally defined as the number of events occurring per Second. This means there is an internal clock multiplier setting (also called bus/core ratio) of 5. The clock multiplier (or CPU multiplier or bus/core ratio) is the ratio of the internal CPU Clock rate to the frequency of its external address/data bus 5. That is, the CPU is set to run at 5. 5 times the frequency of the front side bus: 100 MHz × 5. 5 = 550 MHz. By varying either the FSB or the multiplier, different CPU speeds can be achieved.
Setting a FSB speed is related directly to the speed grade of memory a system must use. A Memory divider is a ratio which is used to determine the operating clock Frequency of Computer memory in accordance with Front Side Bus frequency if The memory bus connects the northbridge and RAM, just as the front side bus connects the CPU and northbridge. Often, these two buses must operate at the same frequency. Increasing the front-side bus to 170 MHz in most cases also means running the memory at 170 MHz.
In newer systems, it is possible to see memory ratios of "4:5" and the like. The memory will run 5/4 times as fast as the FSB in this situation, meaning a 133 MHz bus can run with the memory at 166 MHz. This is often referred to as an 'asynchronous' system. It is important to realize that due to differences in CPU and system architecture, overall system performance can vary in unexpected ways with different FSB-to-memory ratios.
In complex image, audio, video, gaming and scientific applications where the data set is large, FSB speed becomes a major performance issue. A slow FSB will cause the CPU to spend significant amounts of time waiting for data to arrive from system memory.
Similar to the memory bus, the PCI and AGP buses can also be run asynchronously from the front side bus. In older systems, these buses operated at a set fraction of the front side bus frequency. This fraction was set by the BIOS. In newer systems the PCI, AGP, and PCI Express peripheral buses often receive their own clock signals, which eliminates their dependence on the front side bus for timing. The Peripheral Component Interconnect, or PCI Standard (commonly PCI) specifies a Computer bus for attaching peripheral devices to a Computer Not to be confused with PCI-X, a different bus architecture Peripheral Component Interconnect Express, officially abbreviated as PCI-E
Overclocking is the practice of making computer components operate beyond their stock performance levels.
Many motherboards allow the user to manually set the clock multiplier and FSB settings by changing jumpers or BIOS settings. In Computing, the BIOS (ˈbaɪoʊs Many CPU manufacturers now "lock" a preset multiplier setting into the chip. It is possible to unlock some locked CPUs; for instance, some Athlons can be unlocked by connecting electrical contacts across points on the CPU's surface. Athlon is the brand name applied to a series of different X86 processors designed and manufactured by AMD. For all processors, increasing the FSB speed can be done to boost processing speed.
This practice pushes components beyond their specifications and may cause erratic behaviour, overheating or premature failure. Even if the computer appears to run normally, problems may appear under heavy load. For example, during Windows Setup, you may receive a file copy error or experience other problems . Most PCs purchased from retailers or manufacturers, such as Hewlett-Packard or Dell, do not allow the user to change the multiplier or Front Side Bus settings due to the probability of erratic behavior or failure. The multinational technology company Dell Inc develops manufactures sells and supports Personal computers and other computer-related products Motherboards purchased separately to build a custom machine are more likely to allow the user to edit the multiplier and FSB settings in the PC's BIOS. In Computing, the BIOS (ˈbaɪoʊs
Although the front side bus architecture is an aging technology, it does have the advantage of high flexibility and low cost. There is no theoretical limit to the number of CPUs that can be placed on a FSB, though performance will not surely scale linearly across additional CPUs (due to the architecture's bandwidth bottleneck).
The front side bus as it is traditionally known may be disappearing. Originally, this bus was a central connecting point for all system devices and the CPU. However, in recent years this has been breaking down with increasing use of individual point-to-point buses. The front side bus has recently been criticized by AMD as being an old and slow technology that bottlenecks today's computer systems. While a faster CPU can execute individual instructions faster, this is wasted if it can't fetch instructions and data as fast as it can execute them; when this happens, the CPU must wait for one or more clock cycles until the memory returns its value. Furthermore, a fast CPU can be delayed when it must access other devices attached to the FSB. Thus, a slow FSB can become a bottleneck that slows down a fast CPU.