In computer science, channel I/O is a generic term that refers to a high-performance input/output (I/O) architecture that is implemented in various forms on a number of computer architectures, especially on mainframe computers. Computer science (or computing science) is the study and the Science of the theoretical foundations of Information and Computation and their In Computing, input/output, or I/O, refers to the communication between an Information processing system (such as a Computer) and the outside Mainframes (often colloquially referred to as Big Iron) are Computers used mainly by large organizations for critical applications typically bulk data In the past they were generally implemented with a custom processor, known alternately as peripheral processor, I/O processor, I/O controller, or DMA controller.
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Basic principles
Many I/O tasks can be fairly complex and require logic to be applied to the data to convert formats and other similar duties. In these situations the simplest solution is to ask the CPU to handle the logic, but due to the fact that the I/O devices are very slow, the CPU would end up wasting a huge amount of time (in computer perspective) sitting idle waiting for the data from the device. A channel I/O architecture avoids this problem by using a separate, low-cost processor with enough logic and memory onboard to handle these tasks. They are typically not powerful or flexible enough to be used as a computer on their own, and are actually a form of co-processor. A coprocessor is a Computer processor used to supplement the functions of the primary processor (the CPU The CPU sends small programs to the controller to handle an I/O job, which the channel controller can then complete without any help from the CPU. When it is complete, or there is an error, the channel controller communicates with the CPU using a selection of interrupts. In Computing, an interrupt is an asynchronous signal from hardware indicating the need for attention or a synchronous event in software indicating the need for a change Since the channel controller has direct access to the main memory, it is also often referred to as DMA controller (where DMA stands for direct memory access), but that term is somewhat more loose in definition and is often applied to non-programmable devices as well. Direct memory access ( DMA) is a feature of modern Computers and Microprocessors that allows certain hardware subsystems within the computer to access system
History
The first use of channel I/O was with the IBM 709 [1] vacuum tube mainframe, whose Model 766 Data Synchronizer was the first channel in 1957. The IBM 709 was an early Computer system introduced by IBM in August 1958. Its transistorized successor the IBM 7090 [2] had channels (the 7607) and a channel multiplexor (the 7606) which could control up to eight channels. The IBM 7090 was a second-generation Transistorized version of the earlier IBM 709 vacuum tube Mainframe computers and was designed for "large-scale
Later, for larger IBM System/360 computers, and even for early System/370 models, the selector channels and the multiplexor channels still were bulky and expensive separate processors, such as the IBM 2860 'selector channel' and the IBM 2870 'multiplexer channel'. The IBM System/360 ( S/360) is a Mainframe computer system family announced by IBM on April 7, 1964. The IBM System/370 (often S/370) was a model range of IBM mainframes announced on June 30, 1970 For the smaller System/360 computers, the multiplexor channels were implemented in CPU's microcode. Microprogramming (ie writing microcode) is a method that can be employed to implement Machine instructions in a CPU relatively easily often using less Later, the channels were implemented in onboard processors sitting in the same box as the CPU.
One of the earlier non-IBM channel systems was provided in 1964 with the CDC 6600 supercomputer, which used 10 logically independent computers called peripheral processors, or PPs for this role. The CDC 6600 was a Mainframe computer from Control Data Corporation, first delivered in 1964. A supercomputer is a Computer that is at the frontline of processing capacity particularly speed of calculation (at the time of its introduction The PPs were quite powerful, basically a modern version of CDC's first 'personal computer', the CDC 160A. The CDC 160 and CDC 160-A were 12-bit Minicomputers built by Control Data Corporation from the late 1950s through the mid-1960s The operating system resided and executed in one of the PPs (specifically PP0). Since the 1960s channel controllers have been a standard part of almost all mainframe designs, and the primary reason why anyone buys one. The 1960s decade refers to the years from the beginning of 1960 to the end of 1969 Channel controllers have also been made as small as single-chip designs with multiple channels on them, used in the NeXT computers for instance. NeXT Computer Inc (later NeXT Software Inc) was an American Computer company headquartered in Redwood City, California that However with the rapid speed increases in computers today, combined with operating systems that don't "block" when waiting for data, the channel controller has become somewhat redundant and are not commonly found on smaller machines. An operating system (commonly abbreviated OS and O/S) is the software component of a Computer system that is responsible for the management and coordination
Channel controllers can be said to be making a comeback in the form of "bus mastering" peripheral devices, such as PCI direct memory access (DMA) devices. In Computing, bus mastering is a feature supported by many bus architectures that enables a device connected to the bus to initiate transactions The Peripheral Component Interconnect, or PCI Standard (commonly PCI) specifies a Computer bus for attaching peripheral devices to a Computer Direct memory access ( DMA) is a feature of modern Computers and Microprocessors that allows certain hardware subsystems within the computer to access system The rationale for these devices is the same as for the original channel controllers, namely off-loading interrupts and context switching from the main CPU. A context switch is the Computing process of storing and restoring the state ( context) of a CPU such that multiple processes can share
Description
The reference implementation of channel I/O is that of the IBM System/360 family of mainframes and its successors, but similar implementations have been adopted by other mainframe vendors, such as Control Data, Bull (General Electric/Honeywell) and Unisys. Control Data Corporation (CDC, was one of the pioneering Supercomputer firms Groupe Bull (also known as Bull Information Systems or simply Bull) is a French owned Computer company headquartered in Les Clayes-sous-Bois Honeywell ( is a major American multinational conglomerate company that produces a variety of consumer products engineering services and aerospace systems Unisys Corporation ( based in Blue Bell, Pennsylvania, United States, and incorporated in Delaware, is a global provider of information technology
Computer systems that use channel I/O have special hardware components that handle all input/output operations in their entirety independently of the systems' CPU(s). The CPU of a system that uses channel I/O typically has only one machine instruction in its repertoire for input and output; this instruction is used to pass input/output commands to the specialized I/O hardware in the form of channel programs. Machine code or machine language is a system of instructions and data executed directly by a Computer 's Central processing unit. In Computer science, channel I/O is a generic term that refers to a high-performance Input/output (I/O architecture that is implemented in various forms on a number I/O thereafter proceeds without intervention from the CPU until an event requiring notification of the operating system occurs, at which point the I/O hardware signals an interrupt to the CPU.
A channel is an independent hardware component that coordinates all I/O to a set of controllers or devices. It is not merely a medium of communication, despite the name; it is a programmable device that handles all details of I/O after being given a list of I/O operations to carry out (the channel program).
Each channel may support one or more controllers and/or devices. Channel programs contain lists of commands to the channel itself and to various controllers and devices to which it is connected. Once the operating system has prepared a complete list of I/O commands, it executes a single I/O machine instruction to initiate the channel program; the channel thereafter assumes control of the I/O operations until they are completed.
It is possible to develop very complex channel programs, initiating many different I/O operations on many different I/O devices simultaneously. This flexibility frees the CPU from the overhead of starting, monitoring, and managing individual I/O operations. The specialized channel hardware, in turn, is dedicated to I/O and can carry it out more efficiently than the CPU (and entirely in parallel with the CPU). Channel I/O is not unlike the Direct Memory Access (DMA) of microcomputers, only more complex and advanced. Direct memory access ( DMA) is a feature of modern Computers and Microprocessors that allows certain hardware subsystems within the computer to access system Most mainframe operating systems do not fully exploit all the features of channel I/O.
On large mainframe computer systems, CPUs are only one of several powerful hardware components that work in parallel. Special input/output controllers (the exact names of which vary from one manufacturer to another) handle I/O exclusively, and these in turn are connected to hardware channels that also are dedicated to input and output. There may be several CPUs and several I/O processors. The overall architecture optimizes input/output performance without degrading pure CPU performance. Since most real-world applications of mainframe systems are heavily I/O-intensive business applications, this architecture helps provide the very high levels of throughput that distinguish mainframes from other types of computer. In Communication networks, such as Ethernet or Packet radio, throughput is the average rate of successful message delivery over a communication channel
In IBM ESA/390 terminology, a channel is a parallel data connection inside the tree-like or hierarchically organized I/O subsystem. International Business Machines Corporation abbreviated IBM and nicknamed "Big Blue", is a multinational Computer Technology ESA/390 (Enterprise Systems Architecture/390 was introduced in September 1990 and is IBM 's last 31-bit -address/ 32-bit -data mainframe computing In System/390 I/O cages, channels either directly connect to devices which are installed inside the cage (communication adapter such as ESCON, FICON, open systems adapter or they run outside of the cage, below the raised floor as cables of the thickness of a thumb and directly connect to channel interfaces on bigger devices like tape subsystems, direct access storage devices (DASDs), terminal concentrators and other ESA/390 systems. ESCON (Enterprise Systems Connection is a data connection created by IBM, and is commonly used to connect their Mainframe computers to peripheral devices such as FICON ( Fiber Connectivity) is the IBM proprietary name for the ANSI FC-SB-3 Single-Byte Command Code Sets-3 Mapping Protocol for Fibre A raised floor (also raised flooring) is a type of Floor used in Office buildings (such as IT Data centers with a high requirement In Mainframe computers and some Minicomputers a direct access storage device, or DASD (ˈdæzdi is any Secondary storage device which has relatively
Channel command words
A channel command word (CCW) is an instruction for a specialized I/O channel processor. In Computer science, an instruction is a single operation of a processor defined by an Instruction set architecture. It is used to initiate an I/O operation on a channel-attached device, such as “read” or “seek”. On system architectures that implement channel I/O, typically all devices are connected by channels, and so all I/O requires the use of CCWs.
CCWs are organized into channel programs by the operating system, an I/O subroutine, a utility program, or by standalone software (such as test and diagnostic programs).
Channel Program
A channel program is a sequence of I/O instructions executed by the input/output channel processor in the IBM System/360 and subsequent architectures. The channel program consists of one or more channel command words. The operating system signals the I/O channel processor to begin executing the channel program with a SSCH (start sub-channel) instruction. The processor is then free to proceed with non-I/O instructions until interrupted. When the operations are complete, the channel posts an interrupt. In earlier models of the IBM mainframe line, the channel processor was an identifiable component, but in modern mainframes, the channels are implemented in a microcode running in multi-core processor-on-a-chip, called System Assistance Processor (SAP). Hence the earlier SIO (start I/O) and SIOF (start I/O fast release) assembler instructions are replaced by the SSCH (start sub-channel) instruction.
Channel I/O provides considerable economies in input/output. For example, on IBM's Linux/390, the formatting of an entire track of a DASD requires only one channel program (and thus only one I/O instruction). Linux on System z is the collective term for the Linux operating system compiled to run on IBM mainframes especially System z machines In Mainframe computers and some Minicomputers a direct access storage device, or DASD (ˈdæzdi is any Secondary storage device which has relatively The program is executed by the dedicated I/O processor, while the application processor (the CPU) is free for other work.
Booting with channel I/O
Even bootstrapping of the system, or Initial program load (IPL) in IBM nomenclature, is carried out by channels: to load the system, a very small, simple channel program is loaded into memory and initiated, and this program causes the first portion of the system loading software to be loaded. This is the history of bootstrapping or booting which began in the 1880s as a leather strap and evolved into a group of metaphors that share a common meaning a self-sustaining In Computing, booting ( booting up) is a bootstrapping process that starts Operating systems when the user turns on a Computer system The software is then executed once the I/O is completed, and an interrupt is signaled to the CPU.
See also
References
In Computing, booting ( booting up) is a bootstrapping process that starts Operating systems when the user turns on a Computer system In Computing, booting ( booting up) is a bootstrapping process that starts Operating systems when the user turns on a Computer system The IBM System/360 ( S/360) is a Mainframe computer system family announced by IBM on April 7, 1964. z/Architecture, initially called ESA Modal Extensions ( ESAME) refers to IBM 's 64-bit computing architecture for a current generation GCOS /ˈdʒiˌkos/ ( G eneral C omprehensive O perating S ystem is a family of Operating systems oriented toward Mainframe The UNIVAC 1110 was the fourth member of Sperry Rand 's UNIVAC 1100 series of computers introduced in 1972.Dapyx Software network: MP3 Explorer | Ebook Manager | Zenithic