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"APRIL" redirects here. See April (disambiguation) for other uses.

Alewife was a cache coherent multiprocessor developed in the early 1990s at the Massachusetts Institute of Technology. In computing Cache coherency (also cache coherence) refers to the integrity of data stored in local caches of a shared resource Multiprocessing is the use of two or more central processing units (CPUs within a single computer system [1][2] It was based on a network of up to 512 processing nodes, each of which used the Sparcle computer architecture,[3] which was formed by modifying a Sun Microsystems SPARC CPU to include the APRIL techniques for fast context switches. Sun Microsystems Inc ( is a multinational vendor of Computers computer components Computer software, and Information technology services SPARC (from Scalable Processor Architecture is a RISC Microprocessor Instruction set architecture originally A context switch is the Computing process of storing and restoring the state ( context) of a CPU such that multiple processes can share [4]

The Alewife project was one of two predecessors cited by the creators of the popular Beowulf cluster multiprocessor. Originally referring to a specific computer built in 1994 Beowulf is a class of Computer clusters similar to the original NASA system [5]

References

  1. ^ Agarwal, A. ; Chaiken, D. ; Johnson, K. ; Kranz, D. ; Kubiatowicz, J. ; Kurihara, K. ; Lim, B. H. ; Maa, G. ; et al. (1991), The MIT Alewife Machine: A Large-Scale Distributed-Memory Multiprocessor, Tech. Report TM-454, Massachusetts Institute of Technology, <http://portal.acm.org/citation.cfm?id=889587> .
  2. ^ Agarwal, A. ; Bianchini, R. ; Chaiken, D. ; Chong, F. T. ; Johnson, K. L. ; Kranz, D. ; Kubiatowicz, J. D. ; Lim, Beng-Hong; et al. (1999), “The MIT Alewife Machine”, Proceedings of the IEEE 87 (3): 430–444, DOI 10. 1109/5. 747864 .
  3. ^ Agarwal, Anant; Kubiatowicz, John; Kranz, David; Lim, Beng-Hong; Yeung, Donald; D'Souza, Godfrey & Parkin, Mike (1993), “Sparcle: An Evolutionary Processor Design for Large-Scale Multiprocessors”, IEEE Micro 13 (3): 48–61, DOI 10. 1109/40. 216748 .
  4. ^ Agarwal, A. ; Lim, B. -H. ; Kranz, D. & Kubiatowicz, J. (1990), “APRIL: a processor architecture for multiprocessing”, Proc. 17th Annual International Symposium on Computer Architecture (ISCA 1990), pp. 104–114, DOI 10. 1109/ISCA. 1990. 134498 .
  5. ^ Sterling, Thomas; Becker, Donald J. ; Savarese, Daniel; Dorband, John E. ; Ranawake, Udaya A. & Packer, Charles V. (1995), “Beowulf: A parallel workstation for scientific computing”, Proc. 24th Int. Conf. Parallel Processing, vol. I, pp. 11–14, <http://citeseer.ist.psu.edu/sterling95beowulf.html> .

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