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AMD K5 PR166
AMD K5 PR166

The K5 was AMD's first x86 processor developed entirely in-house, introduced in March 1996. See also X86 assembly language The generic term x86 refers to the most commercially successful Instruction set architecture in the history of Personal [1]. Its primary competition was Intel's Pentium microprocessor range. The Pentium brand refers to Intel 's single-core x86 Microprocessor based on the P5 fifth-generation Microarchitecture. A microprocessor incorporates most or all of the functions of a Central processing unit (CPU on a single Integrated Although it was originally scheduled for launch in 1995, due to design issues, it was delayed until 1996. [2] AMD as a company was not as mature as Intel regarding microprocessor design, thus a lot of deadlines were missed and there was a lack of manufacturing expertise in scaling designs. The K5's was an ambitious design, closer to a Pentium Pro than a Pentium regarding technical solutions and internal architecture. However, the final product was regrettably closer to the Pentium regarding performance.

Contents

Technical details

K5 core diagram
K5 core diagram

The K5 was based upon an internal highly parallel 29k RISC processor architecture with an x86 decoding front-end. AMD 29000, often simply 29k, was a popular family of RISC -based 32-bit Microprocessors and Microcontrollers from Advanced Micro Devices The K5 offered good x86 compatibility. All models had 4. 3 million transistors, with five integer units that could process instructions out of order and one floating point unit. In Electronics, a transistor is a Semiconductor device commonly used to amplify or switch electronic signals The branch target buffer was four times the size of the Pentium's and register renaming improved parallel performance of the pipelines. The chips speculative execution of instructions reduced pipeline stall. It touted an instruction cache of 16 KiB, which was double that of the Pentium. Further, the primary cache was a "4-way" set associative, instead of the Pentium's "2-way" set. The K5 lacked MMX instructions, which Intel started offering in its Pentium MMX processors that were launched in early 1997. MMX is a single instruction multiple data (SIMD Instruction set designed by Intel, introduced in 1997 in their Pentium line of Compared to the Pentium the K5's floating point unit had around 10% less performance clock for clock.

Performance

The K5 project represented an early chance for AMD to take technical leadership from Intel. Although the chip addressed the right design concepts, the actual engineering implementation had its issues. The low clock rates were, in part, due to AMD's limitations as a "cutting edge" manufacturing company at the time, in part due to the design itself (many levels of logic, thus slowing it down). Having a branch prediction unit four times the size of the Pentium, yet reportedly not delivering superior performance is an example of how the actual implementation fell short of the projects goals. Additionally, while the K5's floating point performance was better than that of the Cyrix 6x86, it was weaker than that of the Pentium. The Cyrix 6x86 (codename M1 is a sixth-generation 32-bit 80x86 -compatible Microprocessor designed by Cyrix and manufactured by IBM Because it was late to market and did not meet performance expectations, the K5 never gained the acceptance among large computer manufacturers that the Am486 and AMD K6 enjoyed. The Am486 is a 80486 -class family of Computer processors that was produced by AMD in the 1990s The K6 microprocessor was launched by AMD in 1997 The main advantage of this particular microprocessor is that it was designed to fit into existing desktop designs for

Models

There were two sets of K5 processors, internally called the SSA/5 and the 5k86, both released with the K5 label. The "SSA/5" line ran from 75 to 100 MHz (5K86 P75 to P100, later K5 PR-75 to PR100); the "5k86" line ran from 90 to 133 MHz. However, AMD used what it called a PR rating, or performance rating, to label the chips according to their equivalence to a Pentium of that clock speed. The PR ( P erformance R ating system was developed by AMD in the mid-1990s as a method of comparing their X86 processors to those of rival Thus, a 116 MHz chip from the second line was marketed as the "K5 PR166". Manufacturing delays caused the PR200's arrival to unfortunately nearly align with the release of K6. Since AMD did not want the two chips competing, the K5-PR200 only arrived in small numbers. Enthusiasts have speculated that many PR200 chips were sold as PR166, because of easy overclocking with later PR166 chips. [3]

SSA/5

AMD 5K86-P90 (SSA/5)
AMD 5K86-P90 (SSA/5)

5k86

References

  1. ^ AMD K5. CPU-INFO. COM. Retrieved on 2007-07-11. Year 2007 ( MMVII) was a Common year starting on Monday of the Gregorian calendar in the 21st century. Events 911 - Signing of the Treaty of Saint-Clair-sur-Epte between Charles the Simple and Rollo of Normandy.
  2. ^ Shvets, Gennadiy. AMD K5 microprocessor family. cpu-world. com. Retrieved on 2007-07-11. Year 2007 ( MMVII) was a Common year starting on Monday of the Gregorian calendar in the 21st century. Events 911 - Signing of the Treaty of Saint-Clair-sur-Epte between Charles the Simple and Rollo of Normandy.
  3. ^ AMD K5 PR 200?, Google Groups, August 18, 1998.

External links

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